Methodology to improve Safety Critical SoC based platform: a case study

Machine Hazard Risk is possible and becomes dangerous if the failure affects humans. To create a fail-safe system, industry practice is either adding redundancy in the platform or embedding a safety sensing entity inside a System on Chip (SoC). Different systems require Safety Integrity Level (SIL)...

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Bibliographic Details
Main Authors: Michael, Ooi, Tung Lun, Loo, Eng Keong, Koay
Format: Conference Proceeding
Language:English
Subjects:
firmware safety
Functional Safety
Hazards
Industries
Microcontroller Safety Component
Platform Functional Safety
Redundancy
Reliability
Safety integrity Level SIL
Sensors
System Level Hazard management
System-on-chip
Systematics
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Summary:Machine Hazard Risk is possible and becomes dangerous if the failure affects humans. To create a fail-safe system, industry practice is either adding redundancy in the platform or embedding a safety sensing entity inside a System on Chip (SoC). Different systems require Safety Integrity Level (SIL) certification that varies across different domains. This paper describes a systematic methodology to designing SIL compliant appliances that use SoC without safety entity paired with safety micro-controller as a platform solution. Important system level considerations and learning range from Basic Input Output System (BIOS) enhancement to platform level connectivity choices to monitors are identified and failure prediction is covered in the paper. Conference participants will learn about the methodology through a proof of concept done on a Core platform and Arduino micro-controller.
ISSN:1938-1891
DOI:10.1109/IRPS46558.2021.9405223