General hardware multicasting for fine-grained message-passing architectures

Manycore architectures are increasingly favouring message-passing or partitioned global address spaces (PGAS) over cache coherency for reasons of power efficiency and scalability. However, in the absence of cache coherency, there can be a lack of hardware support for one-to-many communication patter...

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Bibliographic Details
Main Authors: Naylor, Matthew, Moore, Simon W., Thomas, David, Beaumont, Jonathan R., Fleming, Shane, Vousden, Mark, Markettos, A. Theodore, Bytheway, Thomas, Brown, Andrew
Format: Conference Proceeding
Language:English
Subjects:
Computer architecture
Hardware
Multicast communication
Scalability
Software
System recovery
Topology
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Summary:Manycore architectures are increasingly favouring message-passing or partitioned global address spaces (PGAS) over cache coherency for reasons of power efficiency and scalability. However, in the absence of cache coherency, there can be a lack of hardware support for one-to-many communication patterns, which are prevalent in some application domains. To address this, we present new hardware primitives for multicast communication in rack-scale manycore systems. These primitives guarantee delivery to both colocated and distributed destinations, and can capture large unstructured communication patterns precisely. As a result, reliable multicast transfers among any number of software tasks, connected in any topology, can be fully offloaded to hardware. We implement the new primitives in a research platform consisting of 50K RISC-V threads distributed over 48 FPGAs, and demonstrate significant performance benefits on a range of applications expressed using a high-level vertex-centric programming model.
ISSN:2377-5750
DOI:10.1109/PDP52278.2021.00028