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Experimental Validation of Analytical Models for Through-PCB Thermal Vias
This paper investigates the thermal vias (TVs) design in PCB-based power circuits; the study aims to experimentally validate an analytical model for the quick estimation of the TVs thermal resistance. Such a model efficiently supports the identification of the optimum PCB layout and allows avoiding...
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creator | Catalano, Antonio Pio Scognamillo, Ciro Trani, Roberto Castellazzi, Alberto d'Alessandro, Vincenzo |
description | This paper investigates the thermal vias (TVs) design in PCB-based power circuits; the study aims to experimentally validate an analytical model for the quick estimation of the TVs thermal resistance. Such a model efficiently supports the identification of the optimum PCB layout and allows avoiding time-demanding numerical simulations and/or nontrivial measurements. An experimental procedure performed on ad hoc PCB samples is exploited to confirm the model accuracy. The results of repeated measures and their statistical distribution are reported and discussed along with the model predictions. |
doi_str_mv | 10.1109/THERMINIC49743.2020.9420502 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_9420502</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9420502</ieee_id><sourcerecordid>9420502</sourcerecordid><originalsourceid>FETCH-LOGICAL-i118t-ac2a8cd6573fa34645d360e0fbb4b3d7216c66c144db498bad9db45c2681d7ef3</originalsourceid><addsrcrecordid>eNotT81Kw0AYXAXBUvMEXgKeE_fb_bKbPdYQbaBVkei1bPbHrqRJSSLYtzdiD8MMDDPMEHIHNAWg6r5el2_b6rkqUEnkKaOMpgoZzSi7IJGSOUg2QyCXl2TBUGICGePXJBrHL0opCBA8VwtSlT9HN4SD6ybdxh-6DVZPoe_i3serTrenKZjZ2PbWtWPs-yGu90P__blPXouHWbvh8JcLerwhV163o4vOvCTvj2VdrJPNy1NVrDZJAMinRBumc2NFJrnXHAVmlgvqqG8abLiVDIQRwgCibVDljbZqFplhIgcrnedLcvvfG5xzu-O8XQ-n3fk8_wVG0E_f</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Experimental Validation of Analytical Models for Through-PCB Thermal Vias</title><source>IEEE Xplore All Conference Series</source><creator>Catalano, Antonio Pio ; Scognamillo, Ciro ; Trani, Roberto ; Castellazzi, Alberto ; d'Alessandro, Vincenzo</creator><creatorcontrib>Catalano, Antonio Pio ; Scognamillo, Ciro ; Trani, Roberto ; Castellazzi, Alberto ; d'Alessandro, Vincenzo</creatorcontrib><description>This paper investigates the thermal vias (TVs) design in PCB-based power circuits; the study aims to experimentally validate an analytical model for the quick estimation of the TVs thermal resistance. Such a model efficiently supports the identification of the optimum PCB layout and allows avoiding time-demanding numerical simulations and/or nontrivial measurements. An experimental procedure performed on ad hoc PCB samples is exploited to confirm the model accuracy. The results of repeated measures and their statistical distribution are reported and discussed along with the model predictions.</description><identifier>EISSN: 2474-1523</identifier><identifier>EISBN: 9781728176437</identifier><identifier>EISBN: 1728176433</identifier><identifier>DOI: 10.1109/THERMINIC49743.2020.9420502</identifier><language>eng</language><publisher>IEEE</publisher><subject>Analytical models ; Computer architecture ; Layout ; Predictive models ; Thermal analysis ; Thermal resistance</subject><ispartof>2020 26th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), 2020, p.249-253</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9420502$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9420502$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Catalano, Antonio Pio</creatorcontrib><creatorcontrib>Scognamillo, Ciro</creatorcontrib><creatorcontrib>Trani, Roberto</creatorcontrib><creatorcontrib>Castellazzi, Alberto</creatorcontrib><creatorcontrib>d'Alessandro, Vincenzo</creatorcontrib><title>Experimental Validation of Analytical Models for Through-PCB Thermal Vias</title><title>2020 26th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)</title><addtitle>THERMINIC</addtitle><description>This paper investigates the thermal vias (TVs) design in PCB-based power circuits; the study aims to experimentally validate an analytical model for the quick estimation of the TVs thermal resistance. Such a model efficiently supports the identification of the optimum PCB layout and allows avoiding time-demanding numerical simulations and/or nontrivial measurements. An experimental procedure performed on ad hoc PCB samples is exploited to confirm the model accuracy. The results of repeated measures and their statistical distribution are reported and discussed along with the model predictions.</description><subject>Analytical models</subject><subject>Computer architecture</subject><subject>Layout</subject><subject>Predictive models</subject><subject>Thermal analysis</subject><subject>Thermal resistance</subject><issn>2474-1523</issn><isbn>9781728176437</isbn><isbn>1728176433</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2020</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotT81Kw0AYXAXBUvMEXgKeE_fb_bKbPdYQbaBVkei1bPbHrqRJSSLYtzdiD8MMDDPMEHIHNAWg6r5el2_b6rkqUEnkKaOMpgoZzSi7IJGSOUg2QyCXl2TBUGICGePXJBrHL0opCBA8VwtSlT9HN4SD6ybdxh-6DVZPoe_i3serTrenKZjZ2PbWtWPs-yGu90P__blPXouHWbvh8JcLerwhV163o4vOvCTvj2VdrJPNy1NVrDZJAMinRBumc2NFJrnXHAVmlgvqqG8abLiVDIQRwgCibVDljbZqFplhIgcrnedLcvvfG5xzu-O8XQ-n3fk8_wVG0E_f</recordid><startdate>20200914</startdate><enddate>20200914</enddate><creator>Catalano, Antonio Pio</creator><creator>Scognamillo, Ciro</creator><creator>Trani, Roberto</creator><creator>Castellazzi, Alberto</creator><creator>d'Alessandro, Vincenzo</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>20200914</creationdate><title>Experimental Validation of Analytical Models for Through-PCB Thermal Vias</title><author>Catalano, Antonio Pio ; Scognamillo, Ciro ; Trani, Roberto ; Castellazzi, Alberto ; d'Alessandro, Vincenzo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i118t-ac2a8cd6573fa34645d360e0fbb4b3d7216c66c144db498bad9db45c2681d7ef3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2020</creationdate><topic>Analytical models</topic><topic>Computer architecture</topic><topic>Layout</topic><topic>Predictive models</topic><topic>Thermal analysis</topic><topic>Thermal resistance</topic><toplevel>online_resources</toplevel><creatorcontrib>Catalano, Antonio Pio</creatorcontrib><creatorcontrib>Scognamillo, Ciro</creatorcontrib><creatorcontrib>Trani, Roberto</creatorcontrib><creatorcontrib>Castellazzi, Alberto</creatorcontrib><creatorcontrib>d'Alessandro, Vincenzo</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Xplore (Online service)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Catalano, Antonio Pio</au><au>Scognamillo, Ciro</au><au>Trani, Roberto</au><au>Castellazzi, Alberto</au><au>d'Alessandro, Vincenzo</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Experimental Validation of Analytical Models for Through-PCB Thermal Vias</atitle><btitle>2020 26th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC)</btitle><stitle>THERMINIC</stitle><date>2020-09-14</date><risdate>2020</risdate><spage>249</spage><epage>253</epage><pages>249-253</pages><eissn>2474-1523</eissn><eisbn>9781728176437</eisbn><eisbn>1728176433</eisbn><abstract>This paper investigates the thermal vias (TVs) design in PCB-based power circuits; the study aims to experimentally validate an analytical model for the quick estimation of the TVs thermal resistance. Such a model efficiently supports the identification of the optimum PCB layout and allows avoiding time-demanding numerical simulations and/or nontrivial measurements. An experimental procedure performed on ad hoc PCB samples is exploited to confirm the model accuracy. The results of repeated measures and their statistical distribution are reported and discussed along with the model predictions.</abstract><pub>IEEE</pub><doi>10.1109/THERMINIC49743.2020.9420502</doi><tpages>5</tpages></addata></record> |
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ispartof | 2020 26th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), 2020, p.249-253 |
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language | eng |
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subjects | Analytical models Computer architecture Layout Predictive models Thermal analysis Thermal resistance |
title | Experimental Validation of Analytical Models for Through-PCB Thermal Vias |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-01T01%3A25%3A36IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Experimental%20Validation%20of%20Analytical%20Models%20for%20Through-PCB%20Thermal%20Vias&rft.btitle=2020%2026th%20International%20Workshop%20on%20Thermal%20Investigations%20of%20ICs%20and%20Systems%20(THERMINIC)&rft.au=Catalano,%20Antonio%20Pio&rft.date=2020-09-14&rft.spage=249&rft.epage=253&rft.pages=249-253&rft.eissn=2474-1523&rft_id=info:doi/10.1109/THERMINIC49743.2020.9420502&rft.eisbn=9781728176437&rft.eisbn_list=1728176433&rft_dat=%3Cieee_CHZPO%3E9420502%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i118t-ac2a8cd6573fa34645d360e0fbb4b3d7216c66c144db498bad9db45c2681d7ef3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9420502&rfr_iscdi=true |