Flexible Acceleration of Data Processing with RISC-V DSP, Vector and Custom Extensions

Summary form only given, as follows. A complete record of the panel discussion was not made available for publication as part of the conference proceedings. With its open, modular and extensible ISA, RISC-V architecture is leading the innovations for all computing devices, in particular for the emer...

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Bibliographic Details
Main Author: Su, Charlie Hong-Men
Format: Conference Proceeding
Language:English
Subjects:
Computer architecture
Data processing
Design automation
Distance measurement
Performance evaluation
Technological innovation
Very large scale integration
Online Access:Request full text
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Summary:Summary form only given, as follows. A complete record of the panel discussion was not made available for publication as part of the conference proceedings. With its open, modular and extensible ISA, RISC-V architecture is leading the innovations for all computing devices, in particular for the emerging applications of 5G, AIoT, Automotive, Networking and Storage. In this talk, we will look into RISC-V architecture support to accelerate data computation for applications ranging from audio, voice, image, to video, vision, communication and AI. The RISC-V P extension or packed SIMD/DSP targets for fixed point computations for audio, voice, small image and slow video, usually in cost-sensitive devices. RISC-V V or Vector extension aims for higher data-rate computations in both fixed-point and floating-point computations, usually in high-performance systems. For those interested in pursuing the ultimate performance efficient for domain-specific architecture, RISC-V’s custom extensibility creates a whole new opportunity for innovations. We will also examine how to unlock such potential.
ISSN:2472-9124
DOI:10.1109/VLSI-DAT52063.2021.9427339