Development of robust interconnect model based on design of experiments and multiobjective optimization

• Published in: IEEE transactions on electron devices 2001-09, Vol.48 (9), p.1885-1891
• Main Authors: Qiang Zhang, Liou, J.J., McMacken, J., Thomson, J., Layman, P.
• Format: Article
• Language: English
• Subjects: Boundaries; CMOS; CMOS integrated circuits; Computer simulation; Design of experiments; Integrated circuits; Methodology; Monte Carlo methods; Operations research; Optimization; Studies
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.944173

When designing an integrated circuit, it is important to take into consideration random variations arising from process variability. Traditional optimization studies on VLSI interconnect attempt to find the deterministic optimum of a cost function but do not take into account the effect of these random variations on the objective. We have developed an effective methodology based on TCAD simulation and design of experiments to optimize interconnect including the effects of process variations. The aim of the study is to search for optimum designs that both meet the performance specification and are robust with respect to process variations. A multiobjective optimization technique known as Normal Boundary Intersection is used to find evenly-spaced tradeoff points on the Pareto curve. Designers can then select designs from the curve without using arbitrary weighting parameters. The proposed methodology was applied to a 0.12 /spl mu/m CMOS technology; optimization results are discussed and verified using Monte Carlo simulation.