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Annealing effects on ultrathin MOS capacitors
Silicon oxide with thickness of less than 9 nm is fabricated by tube furnace oxidation. Nitrogen is added to dilute the oxidation rate. Aluminum dots with a radius of 0.05 cm are deposited on the oxide. High frequency capacitance-voltage (HFC-V), conductance-voltage (G-V) and current-voltage (I-V) c...
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Main Authors: | , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | Silicon oxide with thickness of less than 9 nm is fabricated by tube furnace oxidation. Nitrogen is added to dilute the oxidation rate. Aluminum dots with a radius of 0.05 cm are deposited on the oxide. High frequency capacitance-voltage (HFC-V), conductance-voltage (G-V) and current-voltage (I-V) characteristics are measured. Annealing under nitrogen atmosphere is carried out with different times and at different temperature. Densities of the interface states before and after annealing are compared. After annealing, a decrease in density of the interface states is found. Experiments show that 450/spl deg/C annealing for 30 minutes has the lowest density of the interface states. |
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DOI: | 10.1109/HKEDM.2001.946928 |