Power Reduction of a Set-Associative Instruction Cache Using a Dynamic Early Tag Lookup

An energy-efficient instruction cache lookup technique with low area overheads is proposed. The key concept of this Dynamic Early Tag Lookup (DETL) method is to exploit the presence of instruction fetch-bubble cycles. In a fetch-bubble cycle, the index of the matching cache set can be determined ear...

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Bibliographic Details
Main Authors: Yu, Chun-Chang, Hu, Yu Hen, Lu, Yi-Chang, Chen, Charlie Chung-Ping
Format: Conference Proceeding
Language:English
Subjects:
Benchmark testing
dynamic early tag lookup
energy-efficient
Heuristic algorithms
instruction cache
Pipelines
Power demand
processor architecture
Program processors
Random access memory
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Summary:An energy-efficient instruction cache lookup technique with low area overheads is proposed. The key concept of this Dynamic Early Tag Lookup (DETL) method is to exploit the presence of instruction fetch-bubble cycles. In a fetch-bubble cycle, the index of the matching cache set can be determined earlier. Hence, the dynamic energy for parallel memory accesses to irrelevant cache banks can be saved. We implemented the proposed DETL algorithm on a 4-way set-associative instruction cache in a RISC-V micro-architecture, and tested its performance using the SPEC CPU2006 benchmark suite. The experiment results showed a 19.38% dynamic power reduction with an area overhead smaller than 0.1 %.
ISSN:1558-1101
DOI:10.23919/DATE51398.2021.9474191