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An FBAR Driven −261dB FOM Fractional-N PLL
A 1mW −261dB FOM PLL with 91fs jitter is presented that combines a low-noise, high-frequency FBAR reference with the unity-gain harmonic-mixing (HM) PLL to minimize reference noise gain and avoid entirely the amplification of sigma-delta modulator quantization noise and fractional spurs, which, in t...
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creator | Yang, Dihang Murphy, David Darabi, Hooman Behzad, Arya Ruby, Richard Parker, Reed |
description | A 1mW −261dB FOM PLL with 91fs jitter is presented that combines a low-noise, high-frequency FBAR reference with the unity-gain harmonic-mixing (HM) PLL to minimize reference noise gain and avoid entirely the amplification of sigma-delta modulator quantization noise and fractional spurs, which, in turn, allows for a substantially larger loop bandwidth to suppress the VCO noise and speed settling. |
doi_str_mv | 10.1109/RFIC51843.2021.9490409 |
format | conference_proceeding |
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ispartof | 2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2021, p.147-150 |
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source | IEEE Xplore All Conference Series |
subjects | Bandwidth FBAR oscillator Fractional-N PLL Frequency Synthesizer Jitter Quantization (signal) Radiofrequency integrated circuits Sigma-delta modulation Signal generators Voltage-controlled oscillators |
title | An FBAR Driven −261dB FOM Fractional-N PLL |
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