On-Chip Links With Energy-Quality Tradeoff in Error-Resilient and Machine Learning Applications

• Published in: IEEE journal of solid-state circuits 2021-11, Vol.56 (11), p.3533-3543
• Main Authors: Konandur Rajanna, Viveka, Alioto, Massimo
• Format: Article
• Language: English
• Subjects: Circuits; CMOS; Computer vision; Degradation; Energy measurement; Energy-quality tradeoff; error-resilient; Links; low–swing links; Machine learning; networks on chip; Neural networks; Resilience; Resource management; Signal quality; System-on-chip; Transmitters; vision; Wires
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2021.3095343

This article presents a class of on-chip links that reduce energy at graceful signal quality degradation via low-swing tuning, leveraging the error resilience of prominent applications (e.g., machine learning, vision). To mitigate the exponential quality degradation at low swings, sub-word ranking and non-uniform swing allocation are introduced. An efficient swing selection to exploit local variations is presented. The proposed links also outperform approximate links in terms of energy and its variability at ISO-quality, while allowing full-quality execution when needed. The proposed techniques are demonstrated in a 28-nm testchip with differential and voltage-scaled standard CMOS links. Results on 20 dies and 3200 links under neural network (LeNet-5 and AlexNet) and computer vision workloads show that the energy can be reduced by up to 5.1X on average across 20 dies, compared with a conventionally designed link. When reusing conventional transmitter and receiver for easy integration, the minimum energy is comparable with prior best-in-class links using more advanced CMOS technologies and dedicated circuit techniques.