Highly Thermal Dissipation for Large HPC Package Using Liquid Metal Materials

• Main Authors: Huang, Yu Lung, Chung, C. Key, Lin, C.F., Yu, Kuo Haw, Lin, Rung Jeng, Hong, Wilson
• Format: Conference Proceeding
• Language: English
• Subjects: Electronic packaging thermal management; FCBGA; heat sink; heat spreader; Heating systems; high thermal dissipation; liquid metal; Liquid thermal dissipation package; liquid TIM; Liquids; Metals; Silicon; solid TIM; Temperature measurement; thermal simulation; Three-dimensional displays
• ISSN: 2377-5726
• DOI: 10.1109/ECTC32696.2021.00180

Artificial intelligent, human augmentation and interactive robotic engineering are shaping the world rapidly. This trend demands big data transmission rate, but the memory bandwidth was limited. High-bandwidth memory (HBM) was developed to solve this limitation. However, the HBM packages require 2/2 µm Cu line space to have optimum data efficiency. Thus, they are either packed together with GPU or ASIC dies to form a High Performing Computing (HPC) package. The packaging can be either packaged by 2, 4, 6 or 8 HBMs. This causes a package to become very large and generate severe package warpage. HPC package requires extremely high thermal dissipation, but the package warpage induces higher bond line thickness (BLT), causes lower thermal transfer efficiency. Thus, it is crucial to develop a higher and flexible to large-area thermal dissipation package. In this paper, liquid thermal dissipation (LTD) package is developed to enable large package thermal dissipation requirements. In this study, test vehicle A with the size of 50 * 50 mm 2 FCBGA (flip chip ball grid array) was built with LTD interface. The LTD material was filled between the chip surface and heat spreader (HS), it was a liquid form metal with melting point > 10 °C. To compare with solid TIM (thermal interface material) (like Silicon base), LM (liquid metal) TIM does not cause any defect issues such as delamination, coverage decrease, crack and interface layer in the thermal cycle process. In addition, the function of HS-EL (with enhanced layer) can increase the efficiency of heat transfer because of the area ratio of heat transfer (surface area of HS-EL/surface area of chip) > 1 and the effect of high heat flux. Moreover, the HS-EL can be easily designed according to the heat source of chip. The studies were divided into three parts. For the first part, two steps of thermal simulations were conducted. The thermal simulation applied two types of TIM materials; one was using LM and the other was Silicon base as a baseline. Both were built with 80 µm BLT. Results showed that the chip temperature using LM TIM was 16.21 °C lower than that of Silicon base TIM. And the delta temperature between chip surface and HS-EL was 3.45 °C as compared to HS normal with 10.78 °C for using the LM TIM. Lastly, for index theta Junction-to-Case (JC), HS-EL of 0.23 °C /W i s better than HS normal of 0.72 °C /W. Next, the LTD package was built using flip chip assembly line. Two types of HSs (HS normal, HS-EL) were design