Asymmetrical PWM Scheme Eliminating Duty Cycle Limitation in Input-Parallel Output-Series DC-DC Converter

In this letter, an asymmetrical pulsewidth modulation (PWM) scheme is proposed to solve the output voltage unbalance and voltage gain issues of the input-parallel output-series (IPOS) converter when D < 0.5. With the proposed scheme, the natural output voltages balancing and high step-up conversi...

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Bibliographic Details
Published in:IEEE transactions on power electronics 2022-03, Vol.37 (3), p.2485-2490
Main Authors: Bui, Dai-Van, Cha, Honnyong, Nguyen, Chan Viet
Format: Article
Language:English
Subjects:
Asymmetrical pulsewidth modulation (PWM)
Asymmetry
boost converter
Conversion ratio
dual-output
Inductors
input-parallel output-series (IPOS) converter
Power electronics
Prototypes
Pulse duration modulation
Pulse width modulation
Stress
Voltage
voltage balancing
Voltage control
Voltage converters (DC to DC)
Voltage gain
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Description
Summary:In this letter, an asymmetrical pulsewidth modulation (PWM) scheme is proposed to solve the output voltage unbalance and voltage gain issues of the input-parallel output-series (IPOS) converter when D < 0.5. With the proposed scheme, the natural output voltages balancing and high step-up conversion ratio can be extended when D < 0.5. As a result, combined with the conventional PWM scheme, the duty cycle limitation of the IPOS converter is completely eliminated without any extra components or dedicated control. A 2-kW prototype of the IPOS converter was built and tested to verify the performance of the proposed PWM scheme.
ISSN:0885-8993
1941-0107
DOI:10.1109/TPEL.2021.3113732