Threshold-gates in arithmetic circuits

In this paper the design of digital CMOS threshold logic circuits for low power applications is investigated. Two different basic elements for threshold circuits are presented. These circuits are characterized with regard to power and speed. More complex functions, i.e. a 1-bit full adder and an 8-b...

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Bibliographic Details
Main Authors: Burwick, C., Thomas, M., Dienstuhl, J., Goser, K.F.
Format: Conference Proceeding
Language:English
Subjects:
Adders
Arithmetic
Boolean functions
CMOS digital integrated circuits
CMOS logic circuits
Evolutionary computation
Flip-flops
Logic circuits
Microelectronics
Power dissipation
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Summary:In this paper the design of digital CMOS threshold logic circuits for low power applications is investigated. Two different basic elements for threshold circuits are presented. These circuits are characterized with regard to power and speed. More complex functions, i.e. a 1-bit full adder and an 8-bit carry-lookahead adder are given. Moreover an approach for the determination of the W/L-ratios for the transistors with an evolutionary algorithm is discussed.
DOI:10.1109/ICECS.2001.957620