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A Body-Biasing Technique for Single-Event Transient Mitigation in 28-nm Bulk CMOS Process

Single-event transient (SET) glitches can be modified by body-biasing controlling techniques. In this article, a body-biasing configuration is proposed in combinational circuits, which plays no role during devices' normal operation, but significantly mitigates SET disturbance as ion strike happ...

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Published in:IEEE transactions on nuclear science 2021-12, Vol.68 (12), p.2717-2723
Main Authors: Liu, Jingtian, Liang, Bin, Guo, Yang, Chen, Jianjun, Chi, Yaqing, Sun, Qian, Song, Shengyu, Yuan, Hengzhou
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cited_by cdi_FETCH-LOGICAL-c291t-1358926a6f3553b2d6e65f7cf8cd1bdf55e5d218b8cec054ba19f13b1046691e3
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container_issue 12
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container_title IEEE transactions on nuclear science
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creator Liu, Jingtian
Liang, Bin
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Sun, Qian
Song, Shengyu
Yuan, Hengzhou
description Single-event transient (SET) glitches can be modified by body-biasing controlling techniques. In this article, a body-biasing configuration is proposed in combinational circuits, which plays no role during devices' normal operation, but significantly mitigates SET disturbance as ion strike happens. NOR cell chains and NAND cell chains serve as cases to investigate the impact of the proposed configuration on SET vulnerabilities under two groups of heavy-ion experiments. Experimental data illustrate that transistors with body tied to source (BTS) significantly reduce the SET cross section compared with the normal designs. The physical mechanism of the proposed technique is quantitatively analyzed in detail.
doi_str_mv 10.1109/TNS.2021.3123335
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subjects Body-biasing configuration
Chains
CMOS process
Configurations
Heavy ions
Mitigation
Radiation hardening (electronics)
radiation-hardened-by-design (RHBD)
Single event upsets
single-event transient (SET)
Transistors
title A Body-Biasing Technique for Single-Event Transient Mitigation in 28-nm Bulk CMOS Process
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