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A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances
In this paper, a split-gate SiC trench MOSFET (SG-TMOS) with embedded unipolar diode for reverse conduction is proposed. By introducing the split-gate, an embedded MOS-channel diode is formed during the reverse conducting state, and helps to reduce the on-state voltage drop to 1.87 V, which is ~30%...
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creator | Wu, Zheng Xia, Chao Yi, Bo Cheng, Junji Huang, HaiMeng Kong, MouFu Yang, HongQiang Shi, WenKun |
description | In this paper, a split-gate SiC trench MOSFET (SG-TMOS) with embedded unipolar diode for reverse conduction is proposed. By introducing the split-gate, an embedded MOS-channel diode is formed during the reverse conducting state, and helps to reduce the on-state voltage drop to 1.87 V, which is ~30% reduced compared with that of the conventional trench/planar MOSFET (C-TPMOS). Besides, the dynamic performances of the SG-TMOS are significantly improved. The C GD and C GS decrease by 80.3% and 35.2% compared with that of the C-TPMOS. As a result, the total switching loss (E tot ) is reduced by 39.4% compared to that of the C-TPMOS. |
doi_str_mv | 10.1109/ASICON52560.2021.9620233 |
format | conference_proceeding |
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By introducing the split-gate, an embedded MOS-channel diode is formed during the reverse conducting state, and helps to reduce the on-state voltage drop to 1.87 V, which is ~30% reduced compared with that of the conventional trench/planar MOSFET (C-TPMOS). Besides, the dynamic performances of the SG-TMOS are significantly improved. The C GD and C GS decrease by 80.3% and 35.2% compared with that of the C-TPMOS. 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By introducing the split-gate, an embedded MOS-channel diode is formed during the reverse conducting state, and helps to reduce the on-state voltage drop to 1.87 V, which is ~30% reduced compared with that of the conventional trench/planar MOSFET (C-TPMOS). Besides, the dynamic performances of the SG-TMOS are significantly improved. The C GD and C GS decrease by 80.3% and 35.2% compared with that of the C-TPMOS. As a result, the total switching loss (E tot ) is reduced by 39.4% compared to that of the C-TPMOS.</abstract><pub>IEEE</pub><doi>10.1109/ASICON52560.2021.9620233</doi><tpages>4</tpages></addata></record> |
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subjects | Conferences MOSFET Silicon carbide Split gate flash memory cells Switching loss Voltage |
title | A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances |
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