Analysis of On-Silicon-Vias for an Advanced RF-CMOS Process: Experimental Characterization and Modeling

In this work, a circuit model for interconnection channels with vertical inter-metallic transitions based on the experimental characterization is proposed. The circuit model and extraction methodology was verified using a daisy chain structure manufactured in a 180 nm RF-CMOS process. Both, the para...

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Bibliographic Details
Main Authors: Diaz, Carlos A. Sanabria, Aranda, Monico Linares, Gonzalez, Rogelio M. Higuera
Format: Conference Proceeding
Language:English
Subjects:
Analytical models
Communication channels
Data models
Frequency measurement
Integrated circuit interconnections
On-Silicon Vias
Process control
RF-CMOS process
S-parameters
Semiconductor device modeling
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Description
Summary:In this work, a circuit model for interconnection channels with vertical inter-metallic transitions based on the experimental characterization is proposed. The circuit model and extraction methodology was verified using a daisy chain structure manufactured in a 180 nm RF-CMOS process. Both, the parameters extraction methodology and the circuit model were considered for their use in RF applications, whereby they take into account the electromagnetic effects of high frequency. The obtained results show that the proposed circuit model has a maximum average error of 5.06% in magnitude when it is compared with experimental data.
ISSN:2642-3766
DOI:10.1109/CCE53527.2021.9633075