A Novel Temperature Compensated On-chip Current Starved Ring Oscillator

This paper focuses on single ended current starved ring oscillator design implemented on a SoC as a clock. A low power, process and temperature independent circuit is designed in cadence virtuoso tsmc 180 nm technology. A stable oscillation frequency of 1 MHz is obtained for SoC applications. It Con...

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Main Authors: Bhandari, Rahul Harish, Kotabagi, Sujata, Nayak, Ashwini, Netagal, Sanjay, Kamalakar, Shrinidhi
Format: Conference Proceeding
Language:English
Subjects:
CMOS technology
Conferences
Current starved RO
Low power
Power supplies
Regulators
Ring oscillators
SoC
System-on-chip
Temperature compensation
Trim bits
Voltage control
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Kotabagi, Sujata
Nayak, Ashwini
Netagal, Sanjay
Kamalakar, Shrinidhi
description This paper focuses on single ended current starved ring oscillator design implemented on a SoC as a clock. A low power, process and temperature independent circuit is designed in cadence virtuoso tsmc 180 nm technology. A stable oscillation frequency of 1 MHz is obtained for SoC applications. It Consumes 0.075 mW of power at room temperature for a supply voltage of 1.8 V. As the oscillator is driven by a LDO regulator variations across power supply is compromised. A temperature compensation circuit is designed to reduce variation across temperature. The frequency variation across temperature from -40°C to 125°C is ± 2.5%. Trim bits are used to shift the frequency across process corners. Thus overall frequency variation of ±3.5% is achieved.
doi_str_mv 10.1109/INDICON52576.2021.9691709
format conference_proceeding
fullrecord <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_9691709</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9691709</ieee_id><sourcerecordid>9691709</sourcerecordid><originalsourceid>FETCH-LOGICAL-i118t-746d32e4dff811fdc0611eb204441bbe748f337c0bd21079487aa2a569caab183</originalsourceid><addsrcrecordid>eNotj81Kw0AUhUdBsNQ-gZvxARLvnf9Zlqi1UBLQui6T5EYjaRomacG3t9CuzuFbHL7D2BNCigj-eZ2_rLMi10JbkwoQmHrj0YK_YQtvHRqjlUKr_S2bCSl04hW6e7YYx18AEACIWs3Yasnzw4k6vqX9QDFMx0g8O5x7P4aJal70SfXTDjw7xkj9xD-nEE9n_tH237wYq7brwnSID-yuCd1Ii2vO2dfb6zZ7TzbFap0tN0mL6KbEKlNLQapuGofY1BUYRCoFqLNsWZJVrpHSVlDWAsF65WwIImjjqxBKdHLOHi-7LRHthtjuQ_zbXa_Lf74vTjE</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>A Novel Temperature Compensated On-chip Current Starved Ring Oscillator</title><source>IEEE Xplore All Conference Series</source><creator>Bhandari, Rahul Harish ; Kotabagi, Sujata ; Nayak, Ashwini ; Netagal, Sanjay ; Kamalakar, Shrinidhi</creator><creatorcontrib>Bhandari, Rahul Harish ; Kotabagi, Sujata ; Nayak, Ashwini ; Netagal, Sanjay ; Kamalakar, Shrinidhi</creatorcontrib><description>This paper focuses on single ended current starved ring oscillator design implemented on a SoC as a clock. A low power, process and temperature independent circuit is designed in cadence virtuoso tsmc 180 nm technology. A stable oscillation frequency of 1 MHz is obtained for SoC applications. It Consumes 0.075 mW of power at room temperature for a supply voltage of 1.8 V. As the oscillator is driven by a LDO regulator variations across power supply is compromised. A temperature compensation circuit is designed to reduce variation across temperature. The frequency variation across temperature from -40°C to 125°C is ± 2.5%. Trim bits are used to shift the frequency across process corners. Thus overall frequency variation of ±3.5% is achieved.</description><identifier>EISSN: 2325-9418</identifier><identifier>EISBN: 9781665441759</identifier><identifier>EISBN: 1665441755</identifier><identifier>DOI: 10.1109/INDICON52576.2021.9691709</identifier><language>eng</language><publisher>IEEE</publisher><subject>CMOS technology ; Conferences ; Current starved RO ; Low power ; Power supplies ; Regulators ; Ring oscillators ; SoC ; System-on-chip ; Temperature compensation ; Trim bits ; Voltage control</subject><ispartof>2021 IEEE 18th India Council International Conference (INDICON), 2021, p.1-6</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9691709$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9691709$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Bhandari, Rahul Harish</creatorcontrib><creatorcontrib>Kotabagi, Sujata</creatorcontrib><creatorcontrib>Nayak, Ashwini</creatorcontrib><creatorcontrib>Netagal, Sanjay</creatorcontrib><creatorcontrib>Kamalakar, Shrinidhi</creatorcontrib><title>A Novel Temperature Compensated On-chip Current Starved Ring Oscillator</title><title>2021 IEEE 18th India Council International Conference (INDICON)</title><addtitle>INDICON</addtitle><description>This paper focuses on single ended current starved ring oscillator design implemented on a SoC as a clock. A low power, process and temperature independent circuit is designed in cadence virtuoso tsmc 180 nm technology. A stable oscillation frequency of 1 MHz is obtained for SoC applications. It Consumes 0.075 mW of power at room temperature for a supply voltage of 1.8 V. As the oscillator is driven by a LDO regulator variations across power supply is compromised. A temperature compensation circuit is designed to reduce variation across temperature. The frequency variation across temperature from -40°C to 125°C is ± 2.5%. Trim bits are used to shift the frequency across process corners. Thus overall frequency variation of ±3.5% is achieved.</description><subject>CMOS technology</subject><subject>Conferences</subject><subject>Current starved RO</subject><subject>Low power</subject><subject>Power supplies</subject><subject>Regulators</subject><subject>Ring oscillators</subject><subject>SoC</subject><subject>System-on-chip</subject><subject>Temperature compensation</subject><subject>Trim bits</subject><subject>Voltage control</subject><issn>2325-9418</issn><isbn>9781665441759</isbn><isbn>1665441755</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2021</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj81Kw0AUhUdBsNQ-gZvxARLvnf9Zlqi1UBLQui6T5EYjaRomacG3t9CuzuFbHL7D2BNCigj-eZ2_rLMi10JbkwoQmHrj0YK_YQtvHRqjlUKr_S2bCSl04hW6e7YYx18AEACIWs3Yasnzw4k6vqX9QDFMx0g8O5x7P4aJal70SfXTDjw7xkj9xD-nEE9n_tH237wYq7brwnSID-yuCd1Ii2vO2dfb6zZ7TzbFap0tN0mL6KbEKlNLQapuGofY1BUYRCoFqLNsWZJVrpHSVlDWAsF65WwIImjjqxBKdHLOHi-7LRHthtjuQ_zbXa_Lf74vTjE</recordid><startdate>20211219</startdate><enddate>20211219</enddate><creator>Bhandari, Rahul Harish</creator><creator>Kotabagi, Sujata</creator><creator>Nayak, Ashwini</creator><creator>Netagal, Sanjay</creator><creator>Kamalakar, Shrinidhi</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>20211219</creationdate><title>A Novel Temperature Compensated On-chip Current Starved Ring Oscillator</title><author>Bhandari, Rahul Harish ; Kotabagi, Sujata ; Nayak, Ashwini ; Netagal, Sanjay ; Kamalakar, Shrinidhi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i118t-746d32e4dff811fdc0611eb204441bbe748f337c0bd21079487aa2a569caab183</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2021</creationdate><topic>CMOS technology</topic><topic>Conferences</topic><topic>Current starved RO</topic><topic>Low power</topic><topic>Power supplies</topic><topic>Regulators</topic><topic>Ring oscillators</topic><topic>SoC</topic><topic>System-on-chip</topic><topic>Temperature compensation</topic><topic>Trim bits</topic><topic>Voltage control</topic><toplevel>online_resources</toplevel><creatorcontrib>Bhandari, Rahul Harish</creatorcontrib><creatorcontrib>Kotabagi, Sujata</creatorcontrib><creatorcontrib>Nayak, Ashwini</creatorcontrib><creatorcontrib>Netagal, Sanjay</creatorcontrib><creatorcontrib>Kamalakar, Shrinidhi</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bhandari, Rahul Harish</au><au>Kotabagi, Sujata</au><au>Nayak, Ashwini</au><au>Netagal, Sanjay</au><au>Kamalakar, Shrinidhi</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A Novel Temperature Compensated On-chip Current Starved Ring Oscillator</atitle><btitle>2021 IEEE 18th India Council International Conference (INDICON)</btitle><stitle>INDICON</stitle><date>2021-12-19</date><risdate>2021</risdate><spage>1</spage><epage>6</epage><pages>1-6</pages><eissn>2325-9418</eissn><eisbn>9781665441759</eisbn><eisbn>1665441755</eisbn><abstract>This paper focuses on single ended current starved ring oscillator design implemented on a SoC as a clock. A low power, process and temperature independent circuit is designed in cadence virtuoso tsmc 180 nm technology. A stable oscillation frequency of 1 MHz is obtained for SoC applications. It Consumes 0.075 mW of power at room temperature for a supply voltage of 1.8 V. As the oscillator is driven by a LDO regulator variations across power supply is compromised. A temperature compensation circuit is designed to reduce variation across temperature. The frequency variation across temperature from -40°C to 125°C is ± 2.5%. Trim bits are used to shift the frequency across process corners. Thus overall frequency variation of ±3.5% is achieved.</abstract><pub>IEEE</pub><doi>10.1109/INDICON52576.2021.9691709</doi><tpages>6</tpages></addata></record>
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subjects CMOS technology
Conferences
Current starved RO
Low power
Power supplies
Regulators
Ring oscillators
SoC
System-on-chip
Temperature compensation
Trim bits
Voltage control
title A Novel Temperature Compensated On-chip Current Starved Ring Oscillator
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-30T13%3A42%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=A%20Novel%20Temperature%20Compensated%20On-chip%20Current%20Starved%20Ring%20Oscillator&rft.btitle=2021%20IEEE%2018th%20India%20Council%20International%20Conference%20(INDICON)&rft.au=Bhandari,%20Rahul%20Harish&rft.date=2021-12-19&rft.spage=1&rft.epage=6&rft.pages=1-6&rft.eissn=2325-9418&rft_id=info:doi/10.1109/INDICON52576.2021.9691709&rft.eisbn=9781665441759&rft.eisbn_list=1665441755&rft_dat=%3Cieee_CHZPO%3E9691709%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i118t-746d32e4dff811fdc0611eb204441bbe748f337c0bd21079487aa2a569caab183%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9691709&rfr_iscdi=true