A Digital Frequency Locked Loop With Minimum Computation Overhead for Heavily Distorted Single-Phase Grid Systems

• Published in: IEEE transactions on instrumentation and measurement 2022, Vol.71, p.1-13
• Main Authors: Satyanarayana, Muddasani, Teja, A. V. Ravi
• Format: Article
• Language: English
• Subjects: Algorithms; Converters; Digital controller; field programmable gate array (FPGA); Field programmable gate arrays; Flowcharts; Frequency drift; Frequency estimation; Frequency locked loops; frequency locked loops (FLLs); Frequency locking; Harmonic analysis; Harmonic distortion; Phase locked loops; Power harmonic filters; Prefilters; second-order generalized integrator (SOGI); single-phase systems; Synchronization; Voltage sags
• ISSN: 0018-9456; 1557-9662
• DOI: 10.1109/TIM.2022.3165273

Grid-connected converters require grid frequency and phase information for controlling the power injections into the grid. This information is achieved by a phase-locked loop (PLL) or frequency-locked loop (FLL) algorithms. The accuracy, reliability, and ease of implementation of the PLL/FLL algorithms in all grid conditions dictate the performance of the grid-connected converters. This article proposes a digital FLL for single-phase grid-connected systems. The proposed FLL tracks the frequency accurately, even in heavily distorted grid conditions. It uses a second-order generalized integrator (SOGI) as a pre-filter and a digital counter, based on the zero-crossing detection (ZCD) logic for estimating the grid frequency and phase angle. It does not require complex filters and tuning of multiple parameters. The implementation of the proposed FLL is simple and has less computational overhead. The ability of the proposed FLL to track the frequency and phase under various steady-state (dc-offset and harmonics) and transient (voltage sag, frequency drift, and phase jump) grid disturbances is tested in simulation using MATLAB/SIMULINK, and the results are reported. The experimental validation is done using a field programmable gate array (FPGA) controller in the laboratory. The proposed algorithm is able to track the estimates within 1.2 cycles of the grid voltage when tested under a heavy-distorted grid having 26.4% total harmonic distortion (THD). The measurement uncertainties and results of single-phase grid-connected inverter (GCI) using the proposed FLL are also presented.