The Laplace Microarchitecture for Tracking Data Uncertainty

• Published in: IEEE MICRO 2022-07, Vol.42 (4), p.78-86
• Main Authors: Tsoutsouras, Vasileios, Kaparounakis, Orestis, Samarakoon, Chatura, Bilgin, Bilgesu, Meech, James, Heck, Jan, Stanley-Marbell, Phillip
• Format: Article
• Language: English
• Subjects: Approximation; Arithmetic; arithmetic on distributions; Computer architecture; distributional representations; Domain specific languages; Floating point arithmetic; Measurement uncertainty; Microarchitecture; Microprocessors; Probability distribution; Random variables; Registers; Representations; RISC-V; Tracking; Uncertainty; uncertainty tracking
• ISSN: 0272-1732; 1937-4143
• DOI: 10.1109/MM.2022.3166067

This article presents Laplace, a microarchitecture for tracking machine representations of probability distributions paired with architectural state. Laplace uses in-processor distribution representations, which are approximations of probability distributions just as floating-point number representations are approximations of real-valued numbers. The article presents two sets of instruction set architecture (ISA) extensions to 1) provide a mechanism to initialize distributional information in the microarchitecture; and 2) to allow applications to query statistics of the distributional information without exposing the uncertainty representations above the ISA. Unlike existing methods for uncertainty tracking, which require software to be rewritten in a domain-specific language or extensive source-level changes, Laplace achieves all of these benefits while requiring no changes to existing binaries to track uncertainty through them. Compared to repeated Monte Carlo re-executions of applications on a conventional microarchitecture, Laplace achieves the same level of uncertainty tracking accuracy with 2,076× fewer executed instructions on average (up to 21,343× fewer).