Latency analysis of self-suspending task chains

Many cyber-physical systems are offloading computation-heavy programs to hardware accelerators (e.g., GPU and TPU) to reduce execution time. These applications will self-suspend between offloading data to the accelerators and obtaining the returned results. Previous efforts have shown that self-susp...

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Bibliographic Details
Main Authors: Kloda, Tomasz, Chen, Jiyang, Bertout, Antoine, Sha, Lui, Caccamo, Marco
Format: Conference Proceeding
Language:English
Subjects:
Cyber-physical systems
Data models
Delays
Graphics processing units
Hardware Accelerator
Latency
Message passing
Processor scheduling
Real-time
Scheduling
Self-suspension
Simulation
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Summary:Many cyber-physical systems are offloading computation-heavy programs to hardware accelerators (e.g., GPU and TPU) to reduce execution time. These applications will self-suspend between offloading data to the accelerators and obtaining the returned results. Previous efforts have shown that self-suspending tasks can cause scheduling anomalies, but none has examined inter-task communication. This paper aims to explore self-suspending tasks' data chain latency with periodic activation and asynchronous message passing. We first present the cause for suspension-induced delays and worst-case latency analysis. We then propose a rule for utilizing the hardware co-processors to reduce data chain latency and schedulability analysis. Simulation results show that the proposed strategy can improve overall latency while preserving system schedulability.
ISSN:1558-1101
DOI:10.23919/DATE54114.2022.9774655