Highly stable SOI technology to suppress floating body effect for high performance CMOS device

• Main Authors: Hee Sung Kang, Young-Wug Kim, Kong-Soo Chung, Ki Mum Nam, Kumjong Bae, Nae-In Lee, Chang-Bong Oh, Kwang Il Kim, Sungbae Park, Kwang-Pyuk Suh
• Format: Conference Proceeding
• Language: English
• Subjects: Circuits; CMOS technology; Frequency; Germanium silicon alloys; Large scale integration; Microprocessors; MOS devices; Silicon germanium; Silicon on insulator technology; Threshold voltage
• DOI: 10.1109/IEDM.2001.979475

High performance microprocessors with high stabilities are fabricated on Si and SiGe inserted (SGI) SOI wafers. The operation margins of voltages and frequency are characterized. For body floating devices, the operation margins at high Vdd and low frequency are narrow due to the floating body effect (FBE). These operation limits are drastically improved by applying a body contact for only NMOS at the critical circuits sensitive to the FBE. The maximum operation voltage increases from 1.8 V up to 2.5 V. The minimum operation frequency is lowered from 370 MHz to 220 MHz. The functionality of the NMOS body contact SOI microprocessor is comparable to that of the bulk. To maximize the SOI performance gain, body contacted and floating SOI devices should be optimized, and the smaller portion of body contacted devices are conclusive. For body floating SOI devices, the SGI SOI technology is very effective in suppressing SOI FBE and provides stable circuit operation.