Loading…
Scalable Through Molding Interconnection realization for advanced Fan Out Wafer Level Packaging applications
This study demonstrates the feasibility of a through molding interconnection (TMI) process for which the height can be easily expanded according to the needs of the future application. These TMIs constitute the vertical interconnects required for 3D packaging, in particular in fan out wafer level pa...
Saved in:
Main Authors: | , , , , , , , , |
---|---|
Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | |
---|---|
cites | |
container_end_page | 2127 |
container_issue | |
container_start_page | 2122 |
container_title | |
container_volume | |
creator | Plihon, Aurelia Deschaseaux, Edouard Franiatte, Remi Dechamp, Jerome Vaudaine, Simon Guillaume, Jennifer Brunet-Manquat, Catherine Moreau, Stephane Coudrain, Perceval |
description | This study demonstrates the feasibility of a through molding interconnection (TMI) process for which the height can be easily expanded according to the needs of the future application. These TMIs constitute the vertical interconnects required for 3D packaging, in particular in fan out wafer level packaging (FOWLP) and 3D package on package (PoP) approaches. A simple process has been developed for the realization of TMIs with unprecedented height/pitch ratios. This paper describes the realization of 225 μm high interconnects with a pitch of only 100 μm. The performance of these TMIs is evaluated by morphological and electrical characterizations and aging tests. All these characterizations demonstrate electrical performances and robustness in line with the expectations for vertical interconnections in 3D packages. |
doi_str_mv | 10.1109/ECTC51906.2022.00335 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_9816496</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9816496</ieee_id><sourcerecordid>9816496</sourcerecordid><originalsourceid>FETCH-LOGICAL-h167t-d67092803df23b6f1e9fd999b4f7f3f649ab7a0011d34998d810308b711821de3</originalsourceid><addsrcrecordid>eNotkF1LwzAYhaMgOOd-gV7kD3Tmq0neSymbDiYTrHg53jbJVo3tSLuB_nrn9Oo8N-fhcAi55WzKOYO7WVEWOQemp4IJMWVMyvyMTMBYrnWuDCjJz8lISGOy3Ah9Sa76_p0xxRi3IxJfaoxYRU_Lber2my196qJr2g1dtINPdde2vh6arqXJY2y-8cShSxTdAdvaOzrHlq72A33D4BNd-oOP9BnrD9z8anC3i019qvXX5CJg7P3kP8fkdT4ri8dsuXpYFPfLbMu1GTKnDQNhmXRByEoH7iE4AKhUMEEGrQArg8f93EkFYJ3lTDJbGc6t4M7LMbn58zbe-_UuNZ-YvtZwfESBlj_sTlnk</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Scalable Through Molding Interconnection realization for advanced Fan Out Wafer Level Packaging applications</title><source>IEEE Xplore All Conference Series</source><creator>Plihon, Aurelia ; Deschaseaux, Edouard ; Franiatte, Remi ; Dechamp, Jerome ; Vaudaine, Simon ; Guillaume, Jennifer ; Brunet-Manquat, Catherine ; Moreau, Stephane ; Coudrain, Perceval</creator><creatorcontrib>Plihon, Aurelia ; Deschaseaux, Edouard ; Franiatte, Remi ; Dechamp, Jerome ; Vaudaine, Simon ; Guillaume, Jennifer ; Brunet-Manquat, Catherine ; Moreau, Stephane ; Coudrain, Perceval</creatorcontrib><description>This study demonstrates the feasibility of a through molding interconnection (TMI) process for which the height can be easily expanded according to the needs of the future application. These TMIs constitute the vertical interconnects required for 3D packaging, in particular in fan out wafer level packaging (FOWLP) and 3D package on package (PoP) approaches. A simple process has been developed for the realization of TMIs with unprecedented height/pitch ratios. This paper describes the realization of 225 μm high interconnects with a pitch of only 100 μm. The performance of these TMIs is evaluated by morphological and electrical characterizations and aging tests. All these characterizations demonstrate electrical performances and robustness in line with the expectations for vertical interconnections in 3D packages.</description><identifier>EISSN: 2377-5726</identifier><identifier>EISBN: 9781665479431</identifier><identifier>EISBN: 1665479434</identifier><identifier>DOI: 10.1109/ECTC51906.2022.00335</identifier><identifier>CODEN: IEEPAD</identifier><language>eng</language><publisher>IEEE</publisher><subject>daisy chain ; Electromagnetic compatibility ; Electronic components ; EMC ; Fans ; FOWLP ; Packaging ; RDL ; Resistance ; Robustness ; Three-dimensional displays ; TMI</subject><ispartof>2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), 2022, p.2122-2127</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9816496$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9816496$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Plihon, Aurelia</creatorcontrib><creatorcontrib>Deschaseaux, Edouard</creatorcontrib><creatorcontrib>Franiatte, Remi</creatorcontrib><creatorcontrib>Dechamp, Jerome</creatorcontrib><creatorcontrib>Vaudaine, Simon</creatorcontrib><creatorcontrib>Guillaume, Jennifer</creatorcontrib><creatorcontrib>Brunet-Manquat, Catherine</creatorcontrib><creatorcontrib>Moreau, Stephane</creatorcontrib><creatorcontrib>Coudrain, Perceval</creatorcontrib><title>Scalable Through Molding Interconnection realization for advanced Fan Out Wafer Level Packaging applications</title><title>2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)</title><addtitle>ECTC</addtitle><description>This study demonstrates the feasibility of a through molding interconnection (TMI) process for which the height can be easily expanded according to the needs of the future application. These TMIs constitute the vertical interconnects required for 3D packaging, in particular in fan out wafer level packaging (FOWLP) and 3D package on package (PoP) approaches. A simple process has been developed for the realization of TMIs with unprecedented height/pitch ratios. This paper describes the realization of 225 μm high interconnects with a pitch of only 100 μm. The performance of these TMIs is evaluated by morphological and electrical characterizations and aging tests. All these characterizations demonstrate electrical performances and robustness in line with the expectations for vertical interconnections in 3D packages.</description><subject>daisy chain</subject><subject>Electromagnetic compatibility</subject><subject>Electronic components</subject><subject>EMC</subject><subject>Fans</subject><subject>FOWLP</subject><subject>Packaging</subject><subject>RDL</subject><subject>Resistance</subject><subject>Robustness</subject><subject>Three-dimensional displays</subject><subject>TMI</subject><issn>2377-5726</issn><isbn>9781665479431</isbn><isbn>1665479434</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2022</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotkF1LwzAYhaMgOOd-gV7kD3Tmq0neSymbDiYTrHg53jbJVo3tSLuB_nrn9Oo8N-fhcAi55WzKOYO7WVEWOQemp4IJMWVMyvyMTMBYrnWuDCjJz8lISGOy3Ah9Sa76_p0xxRi3IxJfaoxYRU_Lber2my196qJr2g1dtINPdde2vh6arqXJY2y-8cShSxTdAdvaOzrHlq72A33D4BNd-oOP9BnrD9z8anC3i019qvXX5CJg7P3kP8fkdT4ri8dsuXpYFPfLbMu1GTKnDQNhmXRByEoH7iE4AKhUMEEGrQArg8f93EkFYJ3lTDJbGc6t4M7LMbn58zbe-_UuNZ-YvtZwfESBlj_sTlnk</recordid><startdate>202205</startdate><enddate>202205</enddate><creator>Plihon, Aurelia</creator><creator>Deschaseaux, Edouard</creator><creator>Franiatte, Remi</creator><creator>Dechamp, Jerome</creator><creator>Vaudaine, Simon</creator><creator>Guillaume, Jennifer</creator><creator>Brunet-Manquat, Catherine</creator><creator>Moreau, Stephane</creator><creator>Coudrain, Perceval</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>202205</creationdate><title>Scalable Through Molding Interconnection realization for advanced Fan Out Wafer Level Packaging applications</title><author>Plihon, Aurelia ; Deschaseaux, Edouard ; Franiatte, Remi ; Dechamp, Jerome ; Vaudaine, Simon ; Guillaume, Jennifer ; Brunet-Manquat, Catherine ; Moreau, Stephane ; Coudrain, Perceval</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-h167t-d67092803df23b6f1e9fd999b4f7f3f649ab7a0011d34998d810308b711821de3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2022</creationdate><topic>daisy chain</topic><topic>Electromagnetic compatibility</topic><topic>Electronic components</topic><topic>EMC</topic><topic>Fans</topic><topic>FOWLP</topic><topic>Packaging</topic><topic>RDL</topic><topic>Resistance</topic><topic>Robustness</topic><topic>Three-dimensional displays</topic><topic>TMI</topic><toplevel>online_resources</toplevel><creatorcontrib>Plihon, Aurelia</creatorcontrib><creatorcontrib>Deschaseaux, Edouard</creatorcontrib><creatorcontrib>Franiatte, Remi</creatorcontrib><creatorcontrib>Dechamp, Jerome</creatorcontrib><creatorcontrib>Vaudaine, Simon</creatorcontrib><creatorcontrib>Guillaume, Jennifer</creatorcontrib><creatorcontrib>Brunet-Manquat, Catherine</creatorcontrib><creatorcontrib>Moreau, Stephane</creatorcontrib><creatorcontrib>Coudrain, Perceval</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Plihon, Aurelia</au><au>Deschaseaux, Edouard</au><au>Franiatte, Remi</au><au>Dechamp, Jerome</au><au>Vaudaine, Simon</au><au>Guillaume, Jennifer</au><au>Brunet-Manquat, Catherine</au><au>Moreau, Stephane</au><au>Coudrain, Perceval</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Scalable Through Molding Interconnection realization for advanced Fan Out Wafer Level Packaging applications</atitle><btitle>2022 IEEE 72nd Electronic Components and Technology Conference (ECTC)</btitle><stitle>ECTC</stitle><date>2022-05</date><risdate>2022</risdate><spage>2122</spage><epage>2127</epage><pages>2122-2127</pages><eissn>2377-5726</eissn><eisbn>9781665479431</eisbn><eisbn>1665479434</eisbn><coden>IEEPAD</coden><abstract>This study demonstrates the feasibility of a through molding interconnection (TMI) process for which the height can be easily expanded according to the needs of the future application. These TMIs constitute the vertical interconnects required for 3D packaging, in particular in fan out wafer level packaging (FOWLP) and 3D package on package (PoP) approaches. A simple process has been developed for the realization of TMIs with unprecedented height/pitch ratios. This paper describes the realization of 225 μm high interconnects with a pitch of only 100 μm. The performance of these TMIs is evaluated by morphological and electrical characterizations and aging tests. All these characterizations demonstrate electrical performances and robustness in line with the expectations for vertical interconnections in 3D packages.</abstract><pub>IEEE</pub><doi>10.1109/ECTC51906.2022.00335</doi><tpages>6</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | EISSN: 2377-5726 |
ispartof | 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), 2022, p.2122-2127 |
issn | 2377-5726 |
language | eng |
recordid | cdi_ieee_primary_9816496 |
source | IEEE Xplore All Conference Series |
subjects | daisy chain Electromagnetic compatibility Electronic components EMC Fans FOWLP Packaging RDL Resistance Robustness Three-dimensional displays TMI |
title | Scalable Through Molding Interconnection realization for advanced Fan Out Wafer Level Packaging applications |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-23T17%3A12%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Scalable%20Through%20Molding%20Interconnection%20realization%20for%20advanced%20Fan%20Out%20Wafer%20Level%20Packaging%20applications&rft.btitle=2022%20IEEE%2072nd%20Electronic%20Components%20and%20Technology%20Conference%20(ECTC)&rft.au=Plihon,%20Aurelia&rft.date=2022-05&rft.spage=2122&rft.epage=2127&rft.pages=2122-2127&rft.eissn=2377-5726&rft.coden=IEEPAD&rft_id=info:doi/10.1109/ECTC51906.2022.00335&rft.eisbn=9781665479431&rft.eisbn_list=1665479434&rft_dat=%3Cieee_CHZPO%3E9816496%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-h167t-d67092803df23b6f1e9fd999b4f7f3f649ab7a0011d34998d810308b711821de3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9816496&rfr_iscdi=true |