A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques

Noise-Shaping (NS) SAR ADCs can have high Dynamic Range (DR) and be easily adopted to IoT, audio and many other applications. This paper proposes four techniques to improve the DR and conversion speed of NS SAR ADCs. A prototype NS SAR ADC achieves SNDR/SNR/SFDR of 98.3dB/99.3dB/108.5dB with 100kHz...

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Bibliographic Details
Main Authors: Hasebe, Kazunori, Etou, Shinichirou, Miyazaki, Daisuke, Iguchi, Taiki, Yagishita, Yuki, Takasaki, Mika, Nogamida, Takeru, Watanabe, Hiroyuki, Matsumoto, Tomohiro, Katayama, Yasushi
Format: Conference Proceeding
Language:English
Subjects:
Analog-digital conversion
asynchronous clock
Bandwidth
data weighted averaging
Dynamic range
mismatch error shaping
Noise shaping
noise-shaping SAR ADC
Prototypes
redundancy bit
Registers
Very large scale integration
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Summary:Noise-Shaping (NS) SAR ADCs can have high Dynamic Range (DR) and be easily adopted to IoT, audio and many other applications. This paper proposes four techniques to improve the DR and conversion speed of NS SAR ADCs. A prototype NS SAR ADC achieves SNDR/SNR/SFDR of 98.3dB/99.3dB/108.5dB with 100kHz bandwidth and 12.8MS/s. Schreier FoM reaches 175.3dB.
ISSN:2158-9682
DOI:10.1109/VLSITechnologyandCir46769.2022.9830166