Backside laser testing of ICs for SET sensitivity evaluation

A new experimental approach combining backside laser testing and analog mapping is presented. A new technique for integrated circuits (ICs) backside preparation by laser ablation is evaluated. The methodology is applied to the study of single-event transient (SET) sensitivity on a linear IC.

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2001-12, Vol.48 (6), p.2193-2201
Main Authors: Lewis, D., Pouget, V., Beaudoin, F., Perdu, P., Lapuyade, H., Fouillat, P., Touboul, A.
Format: Article
Language:English
Subjects:
Circuit testing
Engineering Sciences
Integrated circuit metallization
Integrated circuit testing
Integrated circuits
Laser ablation
Laser beams
Laser modes
Lasers
Mapping
Methodology
Micro and nanotechnologies
Microelectronics
Optical propagation
Optical pulses
Surface emitting lasers
Very large scale integration
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Description
Summary:A new experimental approach combining backside laser testing and analog mapping is presented. A new technique for integrated circuits (ICs) backside preparation by laser ablation is evaluated. The methodology is applied to the study of single-event transient (SET) sensitivity on a linear IC.
ISSN:0018-9499
1558-1578
DOI:10.1109/23.983195