A 20F2/Bit Current-Integration-Based Differential nand-Structured PUF for Stable and V/T Variation-Tolerant Low-Cost IoT Security

• Published in: IEEE journal of solid-state circuits 2022-10, Vol.57 (10), p.2957-2968
• Main Authors: Lee, Jongmin, Kim, Minsun, Jeong, Minhyeok, Shin, Gicheol, Lee, Yoonmyung
• Format: Article
• Language: English
• Subjects: Area-efficient; Capacitors; Charging; Circuit stability; cost-effective; Costs; differential NAND; hardware security; Internet of Things; Internet of Things (IoT); Inverters; Low cost; MOSFET; MOSFETs; physically unclonable function (PUF); Security; Semiconductor devices; Stabilization; Threshold voltage; Transistors; weak PUF
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2022.3192903

A current-integration-based differential NAND-structured physically unclonable function (PUF) with 20F 2 area per bit is proposed for low-cost IoT security. Current integration scheme with a capacitor is adopted to generate a response bit by comparing the delay of capacitor charging through pair of selected MOSFET transistors. For area-efficient implementation, minimum-sized MOSFETs are selected from NAND-flash-like array structure. By operating selected MOSFET pairs in moderate inversion mode, higher sensitivity to threshold voltage ( V_{\mathrm {th}} ) variation, and hence more stable response generation, is achieved while keeping it faster than weak inversion operation. A stabilization scheme based on current integration is proposed by discarding or remapping the transistor pairs that generate small charging delay difference. The proposed current-integration-based differential NAND-structured PUF (CI NAND-PUF) achieved high V/T variation tolerance of 0.145%/0.1 V and 0.120%/10 °C while limiting 20F 2 /bit area for 1-bit random response generation. With the proposed stabilization scheme, up to 11\times and 7.7\times BER improvement is achieved for trimming and remapping, respectively.