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A Flip-Chip 180-GHz Receiver in 40-nm CMOS
This paper presents a 180-GHz direct conversion receiver in a standard 40-nm CMOS technology. The CMOS chip is flip-chip assembled to an integrated-passive-device carrier patch antenna for Gb/s wireless communications. The receiver includes a low-noise amplifier, a single-balanced mixer, a frequency...
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Main Authors: | , , , |
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Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
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Summary: | This paper presents a 180-GHz direct conversion receiver in a standard 40-nm CMOS technology. The CMOS chip is flip-chip assembled to an integrated-passive-device carrier patch antenna for Gb/s wireless communications. The receiver includes a low-noise amplifier, a single-balanced mixer, a frequency doubler, and an intermediate frequency amplifier. The demonstrated receiver consumes only 110 mW dc power. It shows a probed measured conversion gain of 28.1 dB and an IP 1dB of −32 dBm. The wireless measurement shows an intermediate frequency bandwidth of 5.5 GHz, supporting a multi-Gb/s wireless connectivity. |
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ISSN: | 2576-7216 |
DOI: | 10.1109/IMS37962.2022.9865425 |