Loading…
PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs
QLC flash-based SSDs are gaining increasing attention and are expected to be widely used in read-intensive application scenarios, since they provide high density and low cost but suffer from poor write endurance and performance. QLC flash has four types of pages, between which read latency variation...
Saved in:
Main Authors: | , , , , , , |
---|---|
Format: | Conference Proceeding |
Language: | English |
Subjects: | |
Online Access: | Request full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | |
---|---|
cites | |
container_end_page | 66 |
container_issue | |
container_start_page | 59 |
container_title | |
container_volume | |
creator | Chen, Qihui Wang, Shuai Zhou, You Wu, Fei Li, Shu Wang, Zhengyong Xie, Changsheng |
description | QLC flash-based SSDs are gaining increasing attention and are expected to be widely used in read-intensive application scenarios, since they provide high density and low cost but suffer from poor write endurance and performance. QLC flash has four types of pages, between which read latency variation is as large as 1.6 to 4.8 times. This raises a critical concern for QLC SSDs to provide adequate and stable read performance. Notice that the SSD-internal cache (built with DRAM or non-volatile RAM) has long been utilized to improve write performance and lifetime. In this paper, we argue that the cache also plays an important role in read performance optimization of QLC SSDs. We design a novel flash page type aware read cache scheme, called PACA. It exploits read latency variation of QLC pages to prioritize caching data stored in high-latency QLC pages in a workload-adaptive manner. We verified PACA in FEMU, a popular SSD emulator. Experimental results show that PACA can reduce the average SSD read latency by up to 44.5%, compared with a baseline read cache scheme being unaware of flash page types. |
doi_str_mv | 10.1109/ICCD56317.2022.00019 |
format | conference_proceeding |
fullrecord | <record><control><sourceid>ieee_CHZPO</sourceid><recordid>TN_cdi_ieee_primary_9978511</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>9978511</ieee_id><sourcerecordid>9978511</sourcerecordid><originalsourceid>FETCH-LOGICAL-i203t-bffaacc9b3f0a7b92d60779792a42cef4eb3e955b87498785a31e74b9787a0423</originalsourceid><addsrcrecordid>eNotj91Kw0AUhFdBsNY-gV7sC6Tu_-Z4t2ytFgJWU6_L2eTERlopWUH69g3ozczFfDMwjN1LMZdSwMMqxoV1Wvq5EkrNhRASLtgMfCmds8bJ0ulLNlHWu8IBuGt2k_PXiJVjZ8LCOsTwyANf4yfxzelIPPziQPydsOURmx3xepQD8f6bv1WRL_eYd0XCTC2v60W-ZVcd7jPN_n3KPpZPm_hSVK_PqxiqoldC_xSp6xCbBpLuBPoEqnXCe_Cg0KiGOkNJE1ibSm-g9KVFLcmbNB7xKIzSU3b3t9sT0fY49AccTlsYcyulPgORbUb6</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs</title><source>IEEE Xplore All Conference Series</source><creator>Chen, Qihui ; Wang, Shuai ; Zhou, You ; Wu, Fei ; Li, Shu ; Wang, Zhengyong ; Xie, Changsheng</creator><creatorcontrib>Chen, Qihui ; Wang, Shuai ; Zhou, You ; Wu, Fei ; Li, Shu ; Wang, Zhengyong ; Xie, Changsheng</creatorcontrib><description>QLC flash-based SSDs are gaining increasing attention and are expected to be widely used in read-intensive application scenarios, since they provide high density and low cost but suffer from poor write endurance and performance. QLC flash has four types of pages, between which read latency variation is as large as 1.6 to 4.8 times. This raises a critical concern for QLC SSDs to provide adequate and stable read performance. Notice that the SSD-internal cache (built with DRAM or non-volatile RAM) has long been utilized to improve write performance and lifetime. In this paper, we argue that the cache also plays an important role in read performance optimization of QLC SSDs. We design a novel flash page type aware read cache scheme, called PACA. It exploits read latency variation of QLC pages to prioritize caching data stored in high-latency QLC pages in a workload-adaptive manner. We verified PACA in FEMU, a popular SSD emulator. Experimental results show that PACA can reduce the average SSD read latency by up to 44.5%, compared with a baseline read cache scheme being unaware of flash page types.</description><identifier>EISSN: 2576-6996</identifier><identifier>EISBN: 9781665461863</identifier><identifier>EISBN: 1665461861</identifier><identifier>DOI: 10.1109/ICCD56317.2022.00019</identifier><identifier>CODEN: IEEPAD</identifier><language>eng</language><publisher>IEEE</publisher><subject>cache management ; Costs ; Flash memory ; Nonvolatile memory ; Optimization ; quad-level cell ; Random access memory ; read performance ; solid-state drive</subject><ispartof>2022 IEEE 40th International Conference on Computer Design (ICCD), 2022, p.59-66</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9978511$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,780,784,789,790,27925,54555,54932</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9978511$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Chen, Qihui</creatorcontrib><creatorcontrib>Wang, Shuai</creatorcontrib><creatorcontrib>Zhou, You</creatorcontrib><creatorcontrib>Wu, Fei</creatorcontrib><creatorcontrib>Li, Shu</creatorcontrib><creatorcontrib>Wang, Zhengyong</creatorcontrib><creatorcontrib>Xie, Changsheng</creatorcontrib><title>PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs</title><title>2022 IEEE 40th International Conference on Computer Design (ICCD)</title><addtitle>ICCD</addtitle><description>QLC flash-based SSDs are gaining increasing attention and are expected to be widely used in read-intensive application scenarios, since they provide high density and low cost but suffer from poor write endurance and performance. QLC flash has four types of pages, between which read latency variation is as large as 1.6 to 4.8 times. This raises a critical concern for QLC SSDs to provide adequate and stable read performance. Notice that the SSD-internal cache (built with DRAM or non-volatile RAM) has long been utilized to improve write performance and lifetime. In this paper, we argue that the cache also plays an important role in read performance optimization of QLC SSDs. We design a novel flash page type aware read cache scheme, called PACA. It exploits read latency variation of QLC pages to prioritize caching data stored in high-latency QLC pages in a workload-adaptive manner. We verified PACA in FEMU, a popular SSD emulator. Experimental results show that PACA can reduce the average SSD read latency by up to 44.5%, compared with a baseline read cache scheme being unaware of flash page types.</description><subject>cache management</subject><subject>Costs</subject><subject>Flash memory</subject><subject>Nonvolatile memory</subject><subject>Optimization</subject><subject>quad-level cell</subject><subject>Random access memory</subject><subject>read performance</subject><subject>solid-state drive</subject><issn>2576-6996</issn><isbn>9781665461863</isbn><isbn>1665461861</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2022</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><recordid>eNotj91Kw0AUhFdBsNY-gV7sC6Tu_-Z4t2ytFgJWU6_L2eTERlopWUH69g3ozczFfDMwjN1LMZdSwMMqxoV1Wvq5EkrNhRASLtgMfCmds8bJ0ulLNlHWu8IBuGt2k_PXiJVjZ8LCOsTwyANf4yfxzelIPPziQPydsOURmx3xepQD8f6bv1WRL_eYd0XCTC2v60W-ZVcd7jPN_n3KPpZPm_hSVK_PqxiqoldC_xSp6xCbBpLuBPoEqnXCe_Cg0KiGOkNJE1ibSm-g9KVFLcmbNB7xKIzSU3b3t9sT0fY49AccTlsYcyulPgORbUb6</recordid><startdate>202210</startdate><enddate>202210</enddate><creator>Chen, Qihui</creator><creator>Wang, Shuai</creator><creator>Zhou, You</creator><creator>Wu, Fei</creator><creator>Li, Shu</creator><creator>Wang, Zhengyong</creator><creator>Xie, Changsheng</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>202210</creationdate><title>PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs</title><author>Chen, Qihui ; Wang, Shuai ; Zhou, You ; Wu, Fei ; Li, Shu ; Wang, Zhengyong ; Xie, Changsheng</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i203t-bffaacc9b3f0a7b92d60779792a42cef4eb3e955b87498785a31e74b9787a0423</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2022</creationdate><topic>cache management</topic><topic>Costs</topic><topic>Flash memory</topic><topic>Nonvolatile memory</topic><topic>Optimization</topic><topic>quad-level cell</topic><topic>Random access memory</topic><topic>read performance</topic><topic>solid-state drive</topic><toplevel>online_resources</toplevel><creatorcontrib>Chen, Qihui</creatorcontrib><creatorcontrib>Wang, Shuai</creatorcontrib><creatorcontrib>Zhou, You</creatorcontrib><creatorcontrib>Wu, Fei</creatorcontrib><creatorcontrib>Li, Shu</creatorcontrib><creatorcontrib>Wang, Zhengyong</creatorcontrib><creatorcontrib>Xie, Changsheng</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library Online</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Chen, Qihui</au><au>Wang, Shuai</au><au>Zhou, You</au><au>Wu, Fei</au><au>Li, Shu</au><au>Wang, Zhengyong</au><au>Xie, Changsheng</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs</atitle><btitle>2022 IEEE 40th International Conference on Computer Design (ICCD)</btitle><stitle>ICCD</stitle><date>2022-10</date><risdate>2022</risdate><spage>59</spage><epage>66</epage><pages>59-66</pages><eissn>2576-6996</eissn><eisbn>9781665461863</eisbn><eisbn>1665461861</eisbn><coden>IEEPAD</coden><abstract>QLC flash-based SSDs are gaining increasing attention and are expected to be widely used in read-intensive application scenarios, since they provide high density and low cost but suffer from poor write endurance and performance. QLC flash has four types of pages, between which read latency variation is as large as 1.6 to 4.8 times. This raises a critical concern for QLC SSDs to provide adequate and stable read performance. Notice that the SSD-internal cache (built with DRAM or non-volatile RAM) has long been utilized to improve write performance and lifetime. In this paper, we argue that the cache also plays an important role in read performance optimization of QLC SSDs. We design a novel flash page type aware read cache scheme, called PACA. It exploits read latency variation of QLC pages to prioritize caching data stored in high-latency QLC pages in a workload-adaptive manner. We verified PACA in FEMU, a popular SSD emulator. Experimental results show that PACA can reduce the average SSD read latency by up to 44.5%, compared with a baseline read cache scheme being unaware of flash page types.</abstract><pub>IEEE</pub><doi>10.1109/ICCD56317.2022.00019</doi><tpages>8</tpages></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | EISSN: 2576-6996 |
ispartof | 2022 IEEE 40th International Conference on Computer Design (ICCD), 2022, p.59-66 |
issn | 2576-6996 |
language | eng |
recordid | cdi_ieee_primary_9978511 |
source | IEEE Xplore All Conference Series |
subjects | cache management Costs Flash memory Nonvolatile memory Optimization quad-level cell Random access memory read performance solid-state drive |
title | PACA: A Page Type Aware Read Cache Scheme in QLC Flash-based SSDs |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T18%3A06%3A03IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_CHZPO&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=PACA:%20A%20Page%20Type%20Aware%20Read%20Cache%20Scheme%20in%20QLC%20Flash-based%20SSDs&rft.btitle=2022%20IEEE%2040th%20International%20Conference%20on%20Computer%20Design%20(ICCD)&rft.au=Chen,%20Qihui&rft.date=2022-10&rft.spage=59&rft.epage=66&rft.pages=59-66&rft.eissn=2576-6996&rft.coden=IEEPAD&rft_id=info:doi/10.1109/ICCD56317.2022.00019&rft.eisbn=9781665461863&rft.eisbn_list=1665461861&rft_dat=%3Cieee_CHZPO%3E9978511%3C/ieee_CHZPO%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-i203t-bffaacc9b3f0a7b92d60779792a42cef4eb3e955b87498785a31e74b9787a0423%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=9978511&rfr_iscdi=true |