Animate vision demonstrator utilising reconfigurable system designs

The justifications for migration from discrete logic implementations to field programmable devices (PLD/FPGA) for state machine, logic replacement and datapath operations are well known and established. They offer the user a flexible design methodology at a gate level for a low initial investment an...

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Bibliographic Details
Main Authors: Shelley, A.J, Seed, N.L
Format: Conference Proceeding
Language:English
Subjects:
Computer vision and image processing techniques
Graphics techniques
Logic and switching circuits
Logic circuits
Memory circuits
Optical information, image and video signal processing
Parallel architecture
Semiconductor integrated circuits
Semiconductor storage
Online Access:Get full text
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Summary:The justifications for migration from discrete logic implementations to field programmable devices (PLD/FPGA) for state machine, logic replacement and datapath operations are well known and established. They offer the user a flexible design methodology at a gate level for a low initial investment and demand no early commitments to high volumes. Furthermore, the capabilities of a volatile static memory based FPGA technology extend well beyond the limited scope of integration enhancement. This paper outlines a reconfigurable image processing architecture (RIPA) and its integration into an animate vision demonstrator.
DOI:10.1049/cp:19950709