Integration of H2 barriers for ferroelectric memories based on SrBi2Ta2O9 (SBT)

• Published in: Integrated ferroelectrics 2000-11, Vol.31 (1-4), p.273-284
• Main Authors: Hartner, Walter, Schindler, Günther, Bosk, Peter, Gabric, Zonimir, Kastner, Markus, Beitel, Gerhard, Mikolajick, Thomas, Dehm, Christine, Mazuré, Carlos
• Format: Article
• Language: English
• Subjects: Encapsulation; Ferroelectrics; Hydrogen; SBT; SrBi; Top Electrode
• ISSN: 1058-4587; 1607-8489
• DOI: 10.1080/10584580008215660

In this study, integration of an hydrogen barrier into a FeRAM process flow is investigated. It is reported in the literature that ferroelectric properties can be maintained after hydrogen annealing by using IrO x as a top electrode [16][17][18]. Advantage of materials like IrO x is less catalytic activity compared to Pt. However, we found that IrO x is not a promising candidate for top electrode barrier. (Pt)/IrO x /SBT/Pt capacitors are prone to shorting or exhibit high leakage. IrO x films are very easily reduced by reducing ambient which will result in peeling off. Also, IrO x films tend to oxidize Ti or TiN layers immediately. Therefore, other barrier materials or layer sequences like Ir/IrO x have to be considered. For protection of the entire capacitor an Encapsulation Barrier Layer (EBL) is required. In this study, LPCVD SiN is used. LPCVD SiN is a standard material in CMOS technology. Production tools are available and it is well known as hydrogen barrier. By modifying the deposition process and using a novel process sequence, no visual damage of the capacitors after SiN-deposition and FGA is seen. Also, no degradation of electrical properties after capacitor formation as well as after SiN-deposition and FGA is observed. However, after metal 1 and metal 2 processing, 2P r values at 1.8V are reduced from 12μC/cm 2 to 2μC/cm 2 . Polarization at 5.0V is not affected.