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Reproducible operating margins on a 72 800-device digital superconducting chip
We report the design and test of reciprocal quantum logic shift-register yield vehicles consisting of up to 72 800 Josephson junction devices per die, the largest digital superconducting circuits ever reported. Multiple physical layout styles were matched to the MIT Lincoln Laboratory foundry, which...
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Published in: | Superconductor science & technology 2015-10, Vol.28 (12), p.124003 |
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Main Authors: | , , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | We report the design and test of reciprocal quantum logic shift-register yield vehicles consisting of up to 72 800 Josephson junction devices per die, the largest digital superconducting circuits ever reported. Multiple physical layout styles were matched to the MIT Lincoln Laboratory foundry, which supports processes with both four and eight metal layers and minimum feature size of 0.5 m. The largest individual circuits with 40 400 junctions indicate large operating margins of 20% on ac clock amplitude. In one case the data were reproducible to the accuracy of the measurement, 1% across five thermal cycles using only the rudimentary precautions of passive mu-metal magnetic shielding and a controlled cool-down rate of 3 mK s−1 in the test fixture. We conclude that with proper mitigation techniques, flux-trapping is no longer a limiting consideration for very-large-scale-integration of superconductor digital logic. |
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ISSN: | 0953-2048 1361-6668 |
DOI: | 10.1088/0953-2048/28/12/124003 |