Study of enhancement-mode GaN pFET with H plasma treated gate recess

This letter showcases the successful fabrication of an enhancement-mode (E-mode) buried p-channel GaN field-effect-transistor on a standard p-GaN/AlGaN/GaN-on-Si power HEMT substrate. The transistor exhibits a threshold voltage ( V TH ) of −3.8 V, a maximum ON-state current ( I ON ) of 1.12 mA/mm, a...

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Bibliographic Details
Published in:Journal of semiconductors 2023-11, Vol.44 (11), p.112801-76
Main Authors: Gao, Xiaotian, Yu, Guohao, Zhou, Jiaan, Wang, Zheming, Li, Yu, Zhang, Jijun, Liang, Xiaoyan, Zeng, Zhongming, Zhang, Baoshun
Format: Article
Language:English
Subjects:
E-mode
GaN pFET
H plasma treatment
ratio
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Summary:This letter showcases the successful fabrication of an enhancement-mode (E-mode) buried p-channel GaN field-effect-transistor on a standard p-GaN/AlGaN/GaN-on-Si power HEMT substrate. The transistor exhibits a threshold voltage ( V TH ) of −3.8 V, a maximum ON-state current ( I ON ) of 1.12 mA/mm, and an impressive I ON / I OFF ratio of 10 7 . To achieve these remarkable results, an H plasma treatment was strategically applied to the gated p-GaN region, where a relatively thick GaN layer (i.e., 70 nm) was kept intact without aggressive gate recess. Through this treatment, the top portion of the GaN layer was converted to be hole-free, leaving only the bottom portion p-type and spatially separated from the etched GaN surface and gate-oxide/GaN interface. This approach allows for E-mode operation while retaining high-quality p-channel characteristics.
ISSN:1674-4926
2058-6140
DOI:10.1088/1674-4926/44/11/112801