FDSOI Suitability for Asynchronous Circuits at Sub-VT

In this work, we explore the benefits of Fully Depleted Silicon-on-Insulator (FDSOI) devices to implement full-adders focused to operate at sub-threshold level. Their design based on asynchronous proposal shows lower energy consumption than their synchronous counterparts. Afterwards, the use of the...

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Bibliographic Details
Main Authors: Amat, Esteve, Christmann, Jean-Frédéric, Billoint, Olivier, Miro, Ivan, Beigne, Edith
Format: Conference Proceeding
Language:English
Online Access:Get full text
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Summary:In this work, we explore the benefits of Fully Depleted Silicon-on-Insulator (FDSOI) devices to implement full-adders focused to operate at sub-threshold level. Their design based on asynchronous proposal shows lower energy consumption than their synchronous counterparts. Afterwards, the use of the FDSOI back-gate bias (VBB) allows an enhancement of sub-threshold circuit behavior, in contrast of other technology proposals. Their proper management could provide a temperature insensitive circuit behavior and larger variability robustness.
ISSN:1938-5862
1938-6737
DOI:10.1149/06605.0315ecst