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Topographic Complexities and Solutions for High Density BEOL MIM Capacitors
The BEOL compatible on-chip MIM capacitors have natural topography post MIM processing. In foundry manufacturing, design-related non uniform pattern density combined with MIM processing can lead to localized topographic process weak points. These weak points add further complexity and reduce the pro...
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Main Authors: | , , , , , , , , , , , , , , , , |
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Format: | Conference Proceeding |
Language: | English |
Online Access: | Get full text |
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Summary: | The BEOL compatible on-chip MIM capacitors have natural topography post MIM processing. In foundry manufacturing, design-related non uniform pattern density combined with MIM processing can lead to localized topographic process weak points. These weak points add further complexity and reduce the process window available to accommodate both MIM capacitors and Cu interconnections. The related fail modes include punch-through of MIM capacitors, un-landed Cu interconnection vias, and shorted Cu lines above the MIM capacitors. These challenges and complexities are described and characterized in this paper, as well as experiments and solutions to overcome these challenges. Manufacturing capability of BEOL MIM capacitors with capacitance density >20fF/μm2, leakage current density 5V has been demonstrated. |
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ISSN: | 1938-5862 1938-6737 1938-6737 1938-5862 |
DOI: | 10.1149/08004.0233ecst |