An InGaAs/InP 40 GHz CML static frequency divider

Static frequency dividers are widely used as a circuit performance benchmark or figure-of-merit indicator to gauge a particular device technology's ability to implement high speed digital and integrated high performance mixed-signal circuits. We report a 2: 1 static frequency divider in InGaAs/...

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Bibliographic Details
Published in:Journal of semiconductors 2011-03, Vol.32 (3), p.035008-1-4
Main Authors: Su, Yongbo (永波 苏), Jin, Zhi (智金), Cheng, Wei (伟程), Ge, Ji (霁葛), Wang, Xiantai (显泰 王), Chen, Gaopeng (高鹏 陈), Liu, Xinyu (新宇 刘), Xu, Anhuai (安怀 徐), Qi, Ming (鸣齐)
Format: Article
Language:English
Subjects:
Circuits
Digital
Frequency dividers
Indium gallium arsenides
Indium phosphides
Logic
Semiconductor devices
Semiconductors
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Summary:Static frequency dividers are widely used as a circuit performance benchmark or figure-of-merit indicator to gauge a particular device technology's ability to implement high speed digital and integrated high performance mixed-signal circuits. We report a 2: 1 static frequency divider in InGaAs/InP heterojunction bipolar transistor technology. This is the first InP based digital integrated circuit ever reported on the mainland of China. The divider is implemented in differential current mode logic (CML) with 30 transistors. The circuit operated at a peak clock frequency of 40 GHz and dissipated 650 mW from a single -5 V supply.
ISSN:1674-4926
DOI:10.1088/1674-4926/32/3/035008