Loading…

A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2nd Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control

This paper presents a 2nd order modified feed-forward (FF) delta-sigma modulator. To reduce power consumption, the proposed analog-to-digital converter (ADC) adopts a class-AB op-amp for the first integrator since it shows an enhanced slew rate with low quiescent current. In addition, a 4-bit asynch...

Full description

Saved in:
Bibliographic Details
Published in:Journal of semiconductor technology and science 2023, 23(5), 113, pp.265-272
Main Authors: Yu, Byeong-Ho, Boo, Jun-Ho, Lim, Jae-Geun, Kim, Hyoung-Jung, Lee, Jae-Hyuk, Ahn, Gil-Cho
Format: Article
Language:English
Subjects:
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
cited_by
cites
container_end_page 272
container_issue 5
container_start_page 265
container_title Journal of semiconductor technology and science
container_volume 23
creator Yu, Byeong-Ho
Boo, Jun-Ho
Lim, Jae-Geun
Kim, Hyoung-Jung
Lee, Jae-Hyuk
Ahn, Gil-Cho
description This paper presents a 2nd order modified feed-forward (FF) delta-sigma modulator. To reduce power consumption, the proposed analog-to-digital converter (ADC) adopts a class-AB op-amp for the first integrator since it shows an enhanced slew rate with low quiescent current. In addition, a 4-bit asynchronous successive approximation register (SAR) ADC which exhibits low power consumption is employed as a quantizer. A delay is incorporated into the feedback path for stable operation of the feedback loop. The prototype ADC is fabricated in a 28 nm CMOS process, and the core area is 0.095 mm2. It consumes 12.3 μW from 0.8 V (Analog)/0.85 V (Digital) supply voltages at an operating clock frequency of 512 kHz with an oversampling ratio (OSR) of 256. It achieves a dynamic range (DR) of 97.7 dB and a peak signal-to-noise and distortion ratio (SNDR) of 94.8 dB, corresponding to a Schreier figure-of-merit (FoM) of 176.8 dB. KCI Citation Count: 0
doi_str_mv 10.5573/JSTS.2023.23.5.265
format article
fullrecord <record><control><sourceid>nurimedia_nrf_k</sourceid><recordid>TN_cdi_nrf_kci_oai_kci_go_kr_ARTI_10319928</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><nurid>NODE11556867</nurid><sourcerecordid>NODE11556867</sourcerecordid><originalsourceid>FETCH-LOGICAL-c193t-4e7fb76bc7c7339cd9f6c4aad8c0d65e7b44f2f3b3f3612de4950aadd80226a83</originalsourceid><addsrcrecordid>eNo9kNFq2zAUhkXZoFnXF9iVbnYzkGtJlmRdOknTdHQztCm7FIolZVoUO0gOJX2JvlCfoc9Uey2FA_-B__vPgR-AbzjPGBP04ufd6i4jOaHZMCwjnJ2ACSGUoqLk_BOYYCZLhDkTp-BLSv_ynJdCigl4qqAUmUBmCue3EJOMopfnPxCj7fIRTnVrHrzp_0LSGlhHYyOc29BrlPxmp-GvzhyC7rsIH_wAabg4hHCEc--cjbbtvQ5wFnRKqJrCeo-q3R4ekm83cBE63Y_Lhz3r2j524Sv47HRI9vxdz8D94nI1W6Kb-up6Vt2gBkvao8IKtxZ83YhGUCobIx1vCq1N2eSGMyvWReGIo2vqKMfE2EKyfLBNmRPCdUnPwI-3u210att41Wn_Xzed2kZV3a6uFc4plpKMMHmDm9ilFK1T--h3Oh4HRI39q7F_NfavhmFq6H8IfX__cBhga7z-SP2u55cYM8ZLLugrQtuDsw</addsrcrecordid><sourcetype>Open Website</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2nd Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control</title><source>Full-Text Journals in Chemistry (Open access)</source><creator>Yu, Byeong-Ho ; Boo, Jun-Ho ; Lim, Jae-Geun ; Kim, Hyoung-Jung ; Lee, Jae-Hyuk ; Ahn, Gil-Cho</creator><creatorcontrib>Yu, Byeong-Ho ; Boo, Jun-Ho ; Lim, Jae-Geun ; Kim, Hyoung-Jung ; Lee, Jae-Hyuk ; Ahn, Gil-Cho</creatorcontrib><description>This paper presents a 2nd order modified feed-forward (FF) delta-sigma modulator. To reduce power consumption, the proposed analog-to-digital converter (ADC) adopts a class-AB op-amp for the first integrator since it shows an enhanced slew rate with low quiescent current. In addition, a 4-bit asynchronous successive approximation register (SAR) ADC which exhibits low power consumption is employed as a quantizer. A delay is incorporated into the feedback path for stable operation of the feedback loop. The prototype ADC is fabricated in a 28 nm CMOS process, and the core area is 0.095 mm2. It consumes 12.3 μW from 0.8 V (Analog)/0.85 V (Digital) supply voltages at an operating clock frequency of 512 kHz with an oversampling ratio (OSR) of 256. It achieves a dynamic range (DR) of 97.7 dB and a peak signal-to-noise and distortion ratio (SNDR) of 94.8 dB, corresponding to a Schreier figure-of-merit (FoM) of 176.8 dB. KCI Citation Count: 0</description><identifier>ISSN: 1598-1657</identifier><identifier>ISSN: 2233-4866</identifier><identifier>EISSN: 2233-4866</identifier><identifier>EISSN: 1598-1657</identifier><identifier>DOI: 10.5573/JSTS.2023.23.5.265</identifier><language>eng</language><publisher>대한전자공학회</publisher><subject>전기공학</subject><ispartof>JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2023, 23(5), 113, pp.265-272</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,776,780,27903,27904</link.rule.ids><backlink>$$Uhttps://www.kci.go.kr/kciportal/ci/sereArticleSearch/ciSereArtiView.kci?sereArticleSearchBean.artiId=ART003009125$$DAccess content in National Research Foundation of Korea (NRF)$$Hfree_for_read</backlink></links><search><creatorcontrib>Yu, Byeong-Ho</creatorcontrib><creatorcontrib>Boo, Jun-Ho</creatorcontrib><creatorcontrib>Lim, Jae-Geun</creatorcontrib><creatorcontrib>Kim, Hyoung-Jung</creatorcontrib><creatorcontrib>Lee, Jae-Hyuk</creatorcontrib><creatorcontrib>Ahn, Gil-Cho</creatorcontrib><title>A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2nd Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control</title><title>Journal of semiconductor technology and science</title><description>This paper presents a 2nd order modified feed-forward (FF) delta-sigma modulator. To reduce power consumption, the proposed analog-to-digital converter (ADC) adopts a class-AB op-amp for the first integrator since it shows an enhanced slew rate with low quiescent current. In addition, a 4-bit asynchronous successive approximation register (SAR) ADC which exhibits low power consumption is employed as a quantizer. A delay is incorporated into the feedback path for stable operation of the feedback loop. The prototype ADC is fabricated in a 28 nm CMOS process, and the core area is 0.095 mm2. It consumes 12.3 μW from 0.8 V (Analog)/0.85 V (Digital) supply voltages at an operating clock frequency of 512 kHz with an oversampling ratio (OSR) of 256. It achieves a dynamic range (DR) of 97.7 dB and a peak signal-to-noise and distortion ratio (SNDR) of 94.8 dB, corresponding to a Schreier figure-of-merit (FoM) of 176.8 dB. KCI Citation Count: 0</description><subject>전기공학</subject><issn>1598-1657</issn><issn>2233-4866</issn><issn>2233-4866</issn><issn>1598-1657</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2023</creationdate><recordtype>article</recordtype><recordid>eNo9kNFq2zAUhkXZoFnXF9iVbnYzkGtJlmRdOknTdHQztCm7FIolZVoUO0gOJX2JvlCfoc9Uey2FA_-B__vPgR-AbzjPGBP04ufd6i4jOaHZMCwjnJ2ACSGUoqLk_BOYYCZLhDkTp-BLSv_ynJdCigl4qqAUmUBmCue3EJOMopfnPxCj7fIRTnVrHrzp_0LSGlhHYyOc29BrlPxmp-GvzhyC7rsIH_wAabg4hHCEc--cjbbtvQ5wFnRKqJrCeo-q3R4ekm83cBE63Y_Lhz3r2j524Sv47HRI9vxdz8D94nI1W6Kb-up6Vt2gBkvao8IKtxZ83YhGUCobIx1vCq1N2eSGMyvWReGIo2vqKMfE2EKyfLBNmRPCdUnPwI-3u210att41Wn_Xzed2kZV3a6uFc4plpKMMHmDm9ilFK1T--h3Oh4HRI39q7F_NfavhmFq6H8IfX__cBhga7z-SP2u55cYM8ZLLugrQtuDsw</recordid><startdate>20231001</startdate><enddate>20231001</enddate><creator>Yu, Byeong-Ho</creator><creator>Boo, Jun-Ho</creator><creator>Lim, Jae-Geun</creator><creator>Kim, Hyoung-Jung</creator><creator>Lee, Jae-Hyuk</creator><creator>Ahn, Gil-Cho</creator><general>대한전자공학회</general><scope>DBRKI</scope><scope>TDB</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>ACYCR</scope></search><sort><creationdate>20231001</creationdate><title>A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2nd Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control</title><author>Yu, Byeong-Ho ; Boo, Jun-Ho ; Lim, Jae-Geun ; Kim, Hyoung-Jung ; Lee, Jae-Hyuk ; Ahn, Gil-Cho</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c193t-4e7fb76bc7c7339cd9f6c4aad8c0d65e7b44f2f3b3f3612de4950aadd80226a83</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2023</creationdate><topic>전기공학</topic><toplevel>online_resources</toplevel><creatorcontrib>Yu, Byeong-Ho</creatorcontrib><creatorcontrib>Boo, Jun-Ho</creatorcontrib><creatorcontrib>Lim, Jae-Geun</creatorcontrib><creatorcontrib>Kim, Hyoung-Jung</creatorcontrib><creatorcontrib>Lee, Jae-Hyuk</creatorcontrib><creatorcontrib>Ahn, Gil-Cho</creatorcontrib><collection>DBPIA - 디비피아</collection><collection>Korean Database (DBpia)</collection><collection>CrossRef</collection><collection>Korean Citation Index</collection><jtitle>Journal of semiconductor technology and science</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Yu, Byeong-Ho</au><au>Boo, Jun-Ho</au><au>Lim, Jae-Geun</au><au>Kim, Hyoung-Jung</au><au>Lee, Jae-Hyuk</au><au>Ahn, Gil-Cho</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2nd Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control</atitle><jtitle>Journal of semiconductor technology and science</jtitle><date>2023-10-01</date><risdate>2023</risdate><volume>23</volume><issue>5</issue><spage>265</spage><epage>272</epage><pages>265-272</pages><issn>1598-1657</issn><issn>2233-4866</issn><eissn>2233-4866</eissn><eissn>1598-1657</eissn><abstract>This paper presents a 2nd order modified feed-forward (FF) delta-sigma modulator. To reduce power consumption, the proposed analog-to-digital converter (ADC) adopts a class-AB op-amp for the first integrator since it shows an enhanced slew rate with low quiescent current. In addition, a 4-bit asynchronous successive approximation register (SAR) ADC which exhibits low power consumption is employed as a quantizer. A delay is incorporated into the feedback path for stable operation of the feedback loop. The prototype ADC is fabricated in a 28 nm CMOS process, and the core area is 0.095 mm2. It consumes 12.3 μW from 0.8 V (Analog)/0.85 V (Digital) supply voltages at an operating clock frequency of 512 kHz with an oversampling ratio (OSR) of 256. It achieves a dynamic range (DR) of 97.7 dB and a peak signal-to-noise and distortion ratio (SNDR) of 94.8 dB, corresponding to a Schreier figure-of-merit (FoM) of 176.8 dB. KCI Citation Count: 0</abstract><pub>대한전자공학회</pub><doi>10.5573/JSTS.2023.23.5.265</doi><tpages>8</tpages></addata></record>
fulltext fulltext
identifier ISSN: 1598-1657
ispartof JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2023, 23(5), 113, pp.265-272
issn 1598-1657
2233-4866
2233-4866
1598-1657
language eng
recordid cdi_nrf_kci_oai_kci_go_kr_ARTI_10319928
source Full-Text Journals in Chemistry (Open access)
subjects 전기공학
title A 97.7-dB DR 12.3-μW 1-kHz Bandwidth 2nd Order Delta-sigma Modulator with a Fully Differential Class-AB Op-Amp using Floating Class-AB Control
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T23%3A07%3A12IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-nurimedia_nrf_k&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%2097.7-dB%20DR%2012.3-%CE%BCW%201-kHz%20Bandwidth%202nd%20Order%20Delta-sigma%20Modulator%20with%20a%20Fully%20Differential%20Class-AB%20Op-Amp%20using%20Floating%20Class-AB%20Control&rft.jtitle=Journal%20of%20semiconductor%20technology%20and%20science&rft.au=Yu,%20Byeong-Ho&rft.date=2023-10-01&rft.volume=23&rft.issue=5&rft.spage=265&rft.epage=272&rft.pages=265-272&rft.issn=1598-1657&rft.eissn=2233-4866&rft_id=info:doi/10.5573/JSTS.2023.23.5.265&rft_dat=%3Cnurimedia_nrf_k%3ENODE11556867%3C/nurimedia_nrf_k%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c193t-4e7fb76bc7c7339cd9f6c4aad8c0d65e7b44f2f3b3f3612de4950aadd80226a83%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_id=info:pmid/&rft_nurid=NODE11556867&rfr_iscdi=true