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Capacitive Readout Circuit for Tri-axes Microaccelerometer with Sub-fF Offset Calibration

This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bi...

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Bibliographic Details
Published in:Journal of semiconductor technology and science 2014, 14(1), 55, pp.83-91
Main Authors: Ouh, Hyun Kyu, Choi, Jungryoul, Lee, Jungwoo, Han, Sangyun, Kim, Sungwook, Seo, Jindeok, Lim, Kyomuk, Seok, Changho, Lim, Seunghyun, Kim, Hyunho, Ko, Hyoungho
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Language:English
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Summary:This paper presents a capacitive readout circuit for tri-axes microaccelerometer with sub-fF offset calibration capability. A charge sensitive amplifier (CSA) with correlated double sampling (CDS) and digital to equivalent capacitance converter (DECC) is proposed. The DECC is implemented using 10-bit DAC, charge transfer switches, and a charge-storing capacitor. The DECC circuit can realize the equivalent capacitance of sub-fF range with a smaller area and higher accuracy than previous offset cancelling circuit using series-connected capacitor arrays. The readout circuit and MEMS sensing element are integrated in a single package. The supply voltage and the current consumption of analog blocks are 3.3 V and 230 μA, respectively. The sensitivities of tri-axes are measured to be 3.87 mg/LSB, 3.87 mg/LSB and 3.90 mg/LSB, respectively. The offset calibration which is controlled by 10-bit DECC has a resolution of 12.4 LSB per step with high linearity. The noise levels of tri-axes are 349 μg/√Hz, 341 μg/√Hz and 411 μg/√Hz, respectively. KCI Citation Count: 5
ISSN:1598-1657
2233-4866
DOI:10.5573/JSTS.2014.14.1.083