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High-efficiency BIRA for embedded memories with a high repair rate and low area overhead
High-efficiency built-in redundancy analysis (BIRA) is presented. The proposed BIRA uses three techniques to achieve a high repair rate using spare mapping registers with adjustable fault tags to reduce area overhead. Simulation results show that the proposed BIRA is a reasonable solution for embedd...
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Published in: | Journal of semiconductor technology and science 2012, 12(3), 47, pp.266-269 |
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Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | High-efficiency built-in redundancy analysis (BIRA) is presented. The proposed BIRA uses three techniques to achieve a high repair rate using spare mapping registers with adjustable fault tags to reduce area overhead. Simulation results show that the proposed BIRA is a reasonable solution for embedded memories. KCI Citation Count: 2 |
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ISSN: | 1598-1657 2233-4866 |
DOI: | 10.5573/JSTS.2012.12.3.266 |