A method for determining average damage depth of sawn crystalline silicon wafers

• Published in: Review of scientific instruments 2016-04, Vol.87 (4)
• Main Authors: Sopori, B., Devayajanam, S., Basnyat, P.
• Format: Article
• Language: English
• Subjects: capacitive coupling; charge recombination; chemical mechanical planarization; dislocations; electron hole recombination; etching; MATERIALS SCIENCE; mechanical stress; passivation; photovoltaics; polymers; semiconductor analysis; semiconductor device fabrication; slurries; solar cells; SOLAR ENERGY
• ISSN: 0034-6748; 1089-7623
• DOI: 10.1063/1.4944792

The depth of surface damage (or simply, damage) in crystalline silicon wafers, caused by wire sawing of ingots, is determined by performing a series of minority carrier lifetime (MCLT) measurements. Samples are sequentially etched to remove thin layers from each surface and MCLT is measured after each etch step. The thickness-removed (δt) at which the lifetime reaches a peak value corresponds to the damage depth. This technique also allows the damage to be quantified in terms of effective surface recombination velocity (Seff). To accomplish this, the MCLT data are converted into an Seff vs δt plot, which represents a quantitative distribution of the degree of damage within the surface layer. We describe a wafer preparation procedure to attain reproducible etching and MCLT measurement results. We also describe important characteristics of an etchant used for controllably removing thin layers from the wafer surfaces. Lastly, some typical results showing changes in the MCLT vs δt plots for different cutting parameters are given.