Study of interconnect errors, network congestion, and applications characteristics for throttle prediction on a large scale HPC system

• Published in: Journal of parallel and distributed computing 2021-07, Vol.153, p.29-43
• Main Authors: Kumar, Mohit, Gupta, Saurabh, Patel, Tirthak, Wilder, Michael, Shi, Weisong, Fu, Song, Engelmann, Christian, Tiwari, Devesh
• Format: Article
• Language: English
• Subjects: Cray; Errors; Gemini; Interconnect; MATHEMATICS AND COMPUTING; Titan
• ISSN: 0743-7315; 1096-0848
• DOI: 10.1016/j.jpdc.2021.03.001

Today’s High Performance Computing (HPC) systems contain thousand of nodes which work together to provide performance in the order of petaflops. The performance of these systems depends on various components like processors, memory, and interconnect. Among all, interconnect plays a major role as it glues together all the hardware components in an HPC system. A slow interconnect can impact a scientific application running on multiple processes severely as they rely on fast network messages to communicate and synchronize frequently. Unfortunately, the HPC community lacks a study that explores different interconnect errors, congestion events and applications characteristics on a large-scale HPC system. In our previous work, we process and analyze interconnect data of the Titan supercomputer to develop a thorough understanding of interconnects faults, errors, and congestion events. In this work, we first show how congestion events can impact application performance. We then investigate application characteristics interaction with interconnect errors and network congestion to predict applications encountering congestion with more than 90% accuracy.