Loading…
Encapsulated gate-all-around InAs nanowire field-effect transistors
We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap...
Saved in:
| Published in: | Applied physics letters 2013-11, Vol.103 (21) |
|---|---|
| Main Authors: | , , , , , , , , |
| Format: | Article |
| Language: | English |
| Subjects: | |
| Citations: | Items that this one cites Items that cite this one |
| Online Access: | Get full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| cited_by | cdi_FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13 |
|---|---|
| cites | cdi_FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13 |
| container_end_page | |
| container_issue | 21 |
| container_start_page | |
| container_title | Applied physics letters |
| container_volume | 103 |
| creator | Sasaki, Satoshi Tateno, Kouta Zhang, Guoqiang Suominen, Henri Harada, Yuichi Saito, Shiro Fujiwara, Akira Sogawa, Tetsuomi Muraki, Koji |
| description | We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap devices. The improved device characteristics can be attributed to the elimination of access resistance associated with ungated segments between the gate and source/drain electrodes. Our data also reveal a correlation between the normalized transconductance and the threshold voltage, which points to a beneficial effect of our wet-etching procedure performed prior to the atomic-layer-deposition of the gate dielectric. |
| doi_str_mv | 10.1063/1.4832058 |
| format | article |
| fullrecord | <record><control><sourceid>proquest_osti_</sourceid><recordid>TN_cdi_osti_scitechconnect_22254022</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>1494319877</sourcerecordid><originalsourceid>FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13</originalsourceid><addsrcrecordid>eNqFkc1LxDAQxYMouK4e_A8KXvQQnXw17XFZ1g9Y8KLnkKZT7dJN1iRF_O-trujRyzwGfsx7wyPknME1g1LcsGtZCQ6qOiAzBlpTwVh1SGYAIGhZK3ZMTlLaTKviQszIcuWd3aVxsBnb4mWa1A4DtTGMvi0e_CIV3vrw3kcsuh6HlmLXoctFjtanPuUQ0yk56uyQ8OxH5-T5dvW0vKfrx7uH5WJNnWQ6U4kMeNNCVWrnZCMUWCixrDpVtUyXGqHhANiI1gLyFtGiaGQtlQJeC2RiTi72d0PKvUmuz-heXfB-ymM450oC5xN1uad2MbyNmLLZ9snhMFiPYUyGaQ1CCynhf3RyF6yutP7z_kU3YYx-etdwxmsFEr6pqz3lYkgpYmd2sd_a-GEYmK9-DDM__YhPJax_JQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>2129504077</pqid></control><display><type>article</type><title>Encapsulated gate-all-around InAs nanowire field-effect transistors</title><source>American Institute of Physics:Jisc Collections:Transitional Journals Agreement 2021-23 (Reading list)</source><source>AIP_美国物理联合会现刊（与NSTL共建）</source><creator>Sasaki, Satoshi ; Tateno, Kouta ; Zhang, Guoqiang ; Suominen, Henri ; Harada, Yuichi ; Saito, Shiro ; Fujiwara, Akira ; Sogawa, Tetsuomi ; Muraki, Koji</creator><creatorcontrib>Sasaki, Satoshi ; Tateno, Kouta ; Zhang, Guoqiang ; Suominen, Henri ; Harada, Yuichi ; Saito, Shiro ; Fujiwara, Akira ; Sogawa, Tetsuomi ; Muraki, Koji</creatorcontrib><description>We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap devices. The improved device characteristics can be attributed to the elimination of access resistance associated with ungated segments between the gate and source/drain electrodes. Our data also reveal a correlation between the normalized transconductance and the threshold voltage, which points to a beneficial effect of our wet-etching procedure performed prior to the atomic-layer-deposition of the gate dielectric.</description><identifier>ISSN: 0003-6951</identifier><identifier>EISSN: 1077-3118</identifier><identifier>DOI: 10.1063/1.4832058</identifier><language>eng</language><publisher>Melville: American Institute of Physics</publisher><subject>Applied physics ; CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS ; CORRELATIONS ; CURRENTS ; DEPOSITION ; DIELECTRIC MATERIALS ; Drains ; ELECTRIC POTENTIAL ; ELECTRODES ; Encapsulation ; ETCHING ; FABRICATION ; FIELD EFFECT TRANSISTORS ; Gates ; INDIUM ARSENIDES ; Nanocomposites ; Nanomaterials ; Nanowires ; Semiconductor devices ; Threshold voltage ; Transconductance ; Transistors</subject><ispartof>Applied physics letters, 2013-11, Vol.103 (21)</ispartof><rights>2013 AIP Publishing LLC.</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13</citedby><cites>FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>230,314,780,782,784,885,27924,27925</link.rule.ids><backlink>$$Uhttps://www.osti.gov/biblio/22254022$$D View this record in Osti.gov$$Hfree_for_read</backlink></links><search><creatorcontrib>Sasaki, Satoshi</creatorcontrib><creatorcontrib>Tateno, Kouta</creatorcontrib><creatorcontrib>Zhang, Guoqiang</creatorcontrib><creatorcontrib>Suominen, Henri</creatorcontrib><creatorcontrib>Harada, Yuichi</creatorcontrib><creatorcontrib>Saito, Shiro</creatorcontrib><creatorcontrib>Fujiwara, Akira</creatorcontrib><creatorcontrib>Sogawa, Tetsuomi</creatorcontrib><creatorcontrib>Muraki, Koji</creatorcontrib><title>Encapsulated gate-all-around InAs nanowire field-effect transistors</title><title>Applied physics letters</title><description>We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap devices. The improved device characteristics can be attributed to the elimination of access resistance associated with ungated segments between the gate and source/drain electrodes. Our data also reveal a correlation between the normalized transconductance and the threshold voltage, which points to a beneficial effect of our wet-etching procedure performed prior to the atomic-layer-deposition of the gate dielectric.</description><subject>Applied physics</subject><subject>CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS</subject><subject>CORRELATIONS</subject><subject>CURRENTS</subject><subject>DEPOSITION</subject><subject>DIELECTRIC MATERIALS</subject><subject>Drains</subject><subject>ELECTRIC POTENTIAL</subject><subject>ELECTRODES</subject><subject>Encapsulation</subject><subject>ETCHING</subject><subject>FABRICATION</subject><subject>FIELD EFFECT TRANSISTORS</subject><subject>Gates</subject><subject>INDIUM ARSENIDES</subject><subject>Nanocomposites</subject><subject>Nanomaterials</subject><subject>Nanowires</subject><subject>Semiconductor devices</subject><subject>Threshold voltage</subject><subject>Transconductance</subject><subject>Transistors</subject><issn>0003-6951</issn><issn>1077-3118</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2013</creationdate><recordtype>article</recordtype><recordid>eNqFkc1LxDAQxYMouK4e_A8KXvQQnXw17XFZ1g9Y8KLnkKZT7dJN1iRF_O-trujRyzwGfsx7wyPknME1g1LcsGtZCQ6qOiAzBlpTwVh1SGYAIGhZK3ZMTlLaTKviQszIcuWd3aVxsBnb4mWa1A4DtTGMvi0e_CIV3vrw3kcsuh6HlmLXoctFjtanPuUQ0yk56uyQ8OxH5-T5dvW0vKfrx7uH5WJNnWQ6U4kMeNNCVWrnZCMUWCixrDpVtUyXGqHhANiI1gLyFtGiaGQtlQJeC2RiTi72d0PKvUmuz-heXfB-ymM450oC5xN1uad2MbyNmLLZ9snhMFiPYUyGaQ1CCynhf3RyF6yutP7z_kU3YYx-etdwxmsFEr6pqz3lYkgpYmd2sd_a-GEYmK9-DDM__YhPJax_JQ</recordid><startdate>20131118</startdate><enddate>20131118</enddate><creator>Sasaki, Satoshi</creator><creator>Tateno, Kouta</creator><creator>Zhang, Guoqiang</creator><creator>Suominen, Henri</creator><creator>Harada, Yuichi</creator><creator>Saito, Shiro</creator><creator>Fujiwara, Akira</creator><creator>Sogawa, Tetsuomi</creator><creator>Muraki, Koji</creator><general>American Institute of Physics</general><scope>AAYXX</scope><scope>CITATION</scope><scope>8FD</scope><scope>H8D</scope><scope>L7M</scope><scope>7QQ</scope><scope>7SP</scope><scope>7U5</scope><scope>JG9</scope><scope>OTOTI</scope></search><sort><creationdate>20131118</creationdate><title>Encapsulated gate-all-around InAs nanowire field-effect transistors</title><author>Sasaki, Satoshi ; Tateno, Kouta ; Zhang, Guoqiang ; Suominen, Henri ; Harada, Yuichi ; Saito, Shiro ; Fujiwara, Akira ; Sogawa, Tetsuomi ; Muraki, Koji</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2013</creationdate><topic>Applied physics</topic><topic>CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS</topic><topic>CORRELATIONS</topic><topic>CURRENTS</topic><topic>DEPOSITION</topic><topic>DIELECTRIC MATERIALS</topic><topic>Drains</topic><topic>ELECTRIC POTENTIAL</topic><topic>ELECTRODES</topic><topic>Encapsulation</topic><topic>ETCHING</topic><topic>FABRICATION</topic><topic>FIELD EFFECT TRANSISTORS</topic><topic>Gates</topic><topic>INDIUM ARSENIDES</topic><topic>Nanocomposites</topic><topic>Nanomaterials</topic><topic>Nanowires</topic><topic>Semiconductor devices</topic><topic>Threshold voltage</topic><topic>Transconductance</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Sasaki, Satoshi</creatorcontrib><creatorcontrib>Tateno, Kouta</creatorcontrib><creatorcontrib>Zhang, Guoqiang</creatorcontrib><creatorcontrib>Suominen, Henri</creatorcontrib><creatorcontrib>Harada, Yuichi</creatorcontrib><creatorcontrib>Saito, Shiro</creatorcontrib><creatorcontrib>Fujiwara, Akira</creatorcontrib><creatorcontrib>Sogawa, Tetsuomi</creatorcontrib><creatorcontrib>Muraki, Koji</creatorcontrib><collection>CrossRef</collection><collection>Technology Research Database</collection><collection>Aerospace Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Ceramic Abstracts</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Materials Research Database</collection><collection>OSTI.GOV</collection><jtitle>Applied physics letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Sasaki, Satoshi</au><au>Tateno, Kouta</au><au>Zhang, Guoqiang</au><au>Suominen, Henri</au><au>Harada, Yuichi</au><au>Saito, Shiro</au><au>Fujiwara, Akira</au><au>Sogawa, Tetsuomi</au><au>Muraki, Koji</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Encapsulated gate-all-around InAs nanowire field-effect transistors</atitle><jtitle>Applied physics letters</jtitle><date>2013-11-18</date><risdate>2013</risdate><volume>103</volume><issue>21</issue><issn>0003-6951</issn><eissn>1077-3118</eissn><abstract>We report the fabrication of lateral gate-all-around InAs nanowire field-effect transistors whose gate overlaps the source and drain electrodes and thus fully encapsulates the nanowire channel. They feature large drive current and transconductance that surpass those of conventional non-gate-overlap devices. The improved device characteristics can be attributed to the elimination of access resistance associated with ungated segments between the gate and source/drain electrodes. Our data also reveal a correlation between the normalized transconductance and the threshold voltage, which points to a beneficial effect of our wet-etching procedure performed prior to the atomic-layer-deposition of the gate dielectric.</abstract><cop>Melville</cop><pub>American Institute of Physics</pub><doi>10.1063/1.4832058</doi></addata></record> |
| fulltext | fulltext |
| identifier | ISSN: 0003-6951 |
| ispartof | Applied physics letters, 2013-11, Vol.103 (21) |
| issn | 0003-6951 1077-3118 |
| language | eng |
| recordid | cdi_osti_scitechconnect_22254022 |
| source | American Institute of Physics:Jisc Collections:Transitional Journals Agreement 2021-23 (Reading list); AIP_美国物理联合会现刊（与NSTL共建） |
| subjects | Applied physics CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS CORRELATIONS CURRENTS DEPOSITION DIELECTRIC MATERIALS Drains ELECTRIC POTENTIAL ELECTRODES Encapsulation ETCHING FABRICATION FIELD EFFECT TRANSISTORS Gates INDIUM ARSENIDES Nanocomposites Nanomaterials Nanowires Semiconductor devices Threshold voltage Transconductance Transistors |
| title | Encapsulated gate-all-around InAs nanowire field-effect transistors |
| url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T02%3A16%3A45IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_osti_&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Encapsulated%20gate-all-around%20InAs%20nanowire%20field-effect%20transistors&rft.jtitle=Applied%20physics%20letters&rft.au=Sasaki,%20Satoshi&rft.date=2013-11-18&rft.volume=103&rft.issue=21&rft.issn=0003-6951&rft.eissn=1077-3118&rft_id=info:doi/10.1063/1.4832058&rft_dat=%3Cproquest_osti_%3E1494319877%3C/proquest_osti_%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c417t-4e102bd0867cc4b350a06e68f58d1767e0b200eb3da0e2deeae3b494550293e13%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=2129504077&rft_id=info:pmid/&rfr_iscdi=true |