Dirac point and transconductance of top-gated graphene field-effect transistors operating at elevated temperature

Top-gated graphene field-effect transistors (GFETs) have been fabricated using bilayer epitaxial graphene grown on the Si-face of 4H-SiC substrates by thermal decomposition of silicon carbide in high vacuum. Graphene films were characterized by Raman spectroscopy, Atomic Force Microscopy, Scanning T...

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Bibliographic Details
Published in:Journal of applied physics 2014-10, Vol.116 (15)
Main Authors: Hopf, T., Vassilevski, K. V., Escobedo-Cousin, E., King, P. J., Wright, N. G., O'Neill, A. G., Horsfall, A. B., Goss, J. P., Wells, G. H., Hunt, M. R. C.
Format: Article
Language:English
Subjects:
ALUMINIUM OXIDES
Aluminum oxide
Applied physics
Atomic beam spectroscopy
ATOMIC FORCE MICROSCOPY
Atomic layer epitaxy
Bilayers
CHARGE TRANSPORT
CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY
DIELECTRIC MATERIALS
Dielectric properties
Dielectric strength
Electrical properties
ELECTRON BEAMS
Epitaxial growth
EPITAXY
FIELD EFFECT TRANSISTORS
GRAPHENE
High temperature
High vacuum
LAYERS
Microscopy
Morphology
Operating temperature
PYROLYSIS
RAMAN SPECTROSCOPY
SCANNING TUNNELING MICROSCOPY
Semiconductor devices
Silicon
Silicon carbide
SILICON CARBIDES
Silicon substrates
SUBSTRATES
TEMPERATURE RANGE 0273-0400 K
Thermal decomposition
THICKNESS
Transconductance
Transistors
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Summary:Top-gated graphene field-effect transistors (GFETs) have been fabricated using bilayer epitaxial graphene grown on the Si-face of 4H-SiC substrates by thermal decomposition of silicon carbide in high vacuum. Graphene films were characterized by Raman spectroscopy, Atomic Force Microscopy, Scanning Tunnelling Microscopy, and Hall measurements to estimate graphene thickness, morphology, and charge transport properties. A 27 nm thick Al2O3 gate dielectric was grown by atomic layer deposition with an e-beam evaporated Al seed layer. Electrical characterization of the GFETs has been performed at operating temperatures up to 100 °C limited by deterioration of the gate dielectric performance at higher temperatures. Devices displayed stable operation with the gate oxide dielectric strength exceeding 4.5 MV/cm at 100 °C. Significant shifting of the charge neutrality point and an increase of the peak transconductance were observed in the GFETs as the operating temperature was elevated from room temperature to 100 °C.
ISSN:0021-8979
1089-7550
DOI:10.1063/1.4898562