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Impact of post metal annealing on gate work function engineering for advanced MOS applications

Ultra thin HfO2 high-k gate dielectric has been deposited directly on strained Si0.81Ge0.19 by Atomic Layer Deposition (ALD) technique. The influence of different types of metal gate electrodes (Al, Au, Pt) on electrical characteristics of Metal-Oxide-Semiconductor capacitors has been studied. Our r...

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Bibliographic Details
Main Authors: Kumar, S. Sachin, Prasad, Amitesh, Sinha, Amrita, Raut, Pratikhya, Das, Palash, Mahato, S. S., Mallik, S.
Format: Conference Proceeding
Language:English
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Summary:Ultra thin HfO2 high-k gate dielectric has been deposited directly on strained Si0.81Ge0.19 by Atomic Layer Deposition (ALD) technique. The influence of different types of metal gate electrodes (Al, Au, Pt) on electrical characteristics of Metal-Oxide-Semiconductor capacitors has been studied. Our results show that the electrical characteristics of MOS device are highly dependent on the gate electrodes used. The dependency of electrical characteristics on post metal annealing was studied in detail. The measured flat band (Vfb) and hysteresis (ΔVfb) from high frequency C-V characteristics were used to study the pre-existing traps in the dielectric. Impact of PMA on interface state density (Dit), border trap density (Nbt) and oxide trap density (Qf/q) of high-k gate stack were also examined for all the devices. The Nbt and frequency dispersion significantly reduces to ~2.77x1010 cm−2 and ~11.34 % respectively in case of Al electrode with a Dit value of ~4x1012 eV−1cm−2 after PMA (350°C) in N2, suggesting an improvement in device performance while Pt electrode shows a much less value of ΔVfb (~0.02 V) and Dit (~3.44x1012 eV−1cm−2) after PMA.
ISSN:0094-243X
1551-7616
DOI:10.1063/1.4946269