Instruction scheduling for the IBM RISC system/6000 processor

For fast execution on the IBM RISC System/6000 processor, instructions should be arranged in an order that uses the arithmetic units as efficiently as possible. This paper describes the scheduling requirements of the machine, and a scheduling algorithm for it that is used in two compilers.

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Bibliographic Details
Published in:IBM journal of research and development 1990, Vol.34 (1), p.85-92
Main Author: WARREN, H. S
Format: Article
Language:English
Subjects:
ALGORITHMS
Applied sciences
ARRAY PROCESSORS
Computer science
control theory
systems
COMPUTERS
Exact sciences and technology
GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE
IBM COMPUTERS
MATHEMATICAL LOGIC
OPTIMIZATION
PARALLEL PROCESSING
PROGRAMMING 990200 > Mathematics & Computers
Theoretical computing
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Description
Summary:For fast execution on the IBM RISC System/6000 processor, instructions should be arranged in an order that uses the arithmetic units as efficiently as possible. This paper describes the scheduling requirements of the machine, and a scheduling algorithm for it that is used in two compilers.
ISSN:0018-8646
2151-8556
0018-8646
DOI:10.1147/rd.341.0085