Electrical performance improvements on RFICs using bump chip carrier packages as compared to standard thin shrink small outline packages

• Published in: IEEE transactions on advanced packaging 2001-11, Vol.24 (4), p.548-554
• Main Authors: HORNG, Tzyy-Sheng, WU, Sung-Mao, CHIU, Chi-Tsung, HUNG, Chih-Pin
• Format: Article
• Language: English
• Subjects: Applied sciences; Body centered cubic lattice; Chip carriers; Circuit properties; Circuit simulation; Computer simulation; Electric variables measurement; Electric, optical and optoelectronic circuits; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Equivalence; Exact sciences and technology; Frequency; Gallium arsenide; Heterojunction bipolar transistors; Insertion loss; Microstrip; Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits; Monte Carlo methods; Packages; Packaging; Radiofrequency integrated circuits; Scattering parameters; Semiconductor device measurement; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors
• ISSN: 1521-3323; 1557-9980
• DOI: 10.1109/6040.982843

The electrical models of bump chip carrier (BCC) packages have been established based on the S-parameter measurement. When compared to the standard thin shrink small outline packages (TSSOPs), BCC packages show much smaller parasitics in the equivalent model. In the simulation, the insertion and return losses for a packaged 50-/spl Omega/ microstrip line are calculated against frequency. BCC packages are also less lossy than TSSOPs over a wide frequency range. By setting a random variable with Gaussian distribution varied within a certain range for each equivalent circuit element of the packages, the Monte Carlo analysis has been performed to study the package effects on a GaAs heterojunction bipolar transistor (HBT). Again, BCC packages cause less decrement of HBT unity-gain bandwidth than TSSOPs.