Mismatch in diffusion resistors caused by photolithography

During the qualification of a 0.35-/spl mu/m CMOS process, it was observed that diffusion resistors showed a systematic mismatch, depending on the position on the wafer. The mismatch increased from the center of the wafer to the outer regions. Various experiments showed that the mismatch was caused...

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Bibliographic Details
Published in:IEEE transactions on semiconductor manufacturing 2003-05, Vol.16 (2), p.181-186
Main Authors: Hausser, S., Majoni, S., Schligtenhorst, H., Kolwe, G.
Format: Article
Language:English
Subjects:
Applied sciences
CMOS
CMOS process
Contact resistance
Design. Technologies. Operation analysis. Testing
Diffusion
Electrical resistance measurement
Electronics
Exact sciences and technology
Immune system
Integrated circuits
Lithography
Metallization
Microelectronic fabrication (materials and surfaces technology)
Photolithography
Qualifications
Resistors
Resists
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Semiconductors
Silicon
Spinning
Testing
Wafers
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Description
Summary:During the qualification of a 0.35-/spl mu/m CMOS process, it was observed that diffusion resistors showed a systematic mismatch, depending on the position on the wafer. The mismatch increased from the center of the wafer to the outer regions. Various experiments showed that the mismatch was caused by spinning the wafer during the resist development process. Changing this process eliminated the systematic diffusion resistor mismatch.
ISSN:0894-6507
1558-2345
DOI:10.1109/TSM.2003.811584