Electrical modeling and measuring inductance in the Micro Lead Chip Carrier

The Micro Lead Chip Carrier is a fine pitch package with low electrical parasitics due to its small size and consequently short conductive paths. This makes the package ideal for such RF applications as personal wireless communications. Several lead count packages were modeled using a rapid solution...

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Bibliographic Details
Main Authors: Ho, K.M., Rebelo, A., Caggiano, M.F., Gilbert, J.
Format: Conference Proceeding
Language:English
Subjects:
Applied sciences
Bonding
Calibration
Design. Technologies. Operation analysis. Testing
Electric variables measurement
Electronics
Exact sciences and technology
Fixtures
Impedance measurement
Inductance measurement
Integrated circuits
Packaging
Performance evaluation
Semiconductor device measurement
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Wire
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Description
Summary:The Micro Lead Chip Carrier is a fine pitch package with low electrical parasitics due to its small size and consequently short conductive paths. This makes the package ideal for such RF applications as personal wireless communications. Several lead count packages were modeled using a rapid solution computer program developed at Rutgers University as well as a commercially available 3D solver program. Finally the same packages were measured using a Vector Network Analyzer. The results of the two sets of simulations and the measurements are compared and will be presented.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.2002.1008342