Reliability of ultra thinning of flip chips for through-silicon analyses

In this paper, we address the issues of global ultra-thinning (/spl les/10 /spl mu/m) of flip chips and develop a reliable and inexpensive process based on a conventional lapping tool and a compact thickness monitoring system. The mechanical and electrical yields as a result of ultra-thinning are re...

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Bibliographic Details
Main Authors: Chun-Cheng Tsao, LeRoy, E., Saha, S., Ansorge, L., Potter, M.E.
Format: Conference Proceeding
Language:English
Subjects:
Acoustic measurements
Applied sciences
Circuits
Design. Technologies. Operation analysis. Testing
Dry etching
Electronic equipment and fabrication. Passive components, printed wiring boards, connectics
Electronics
Exact sciences and technology
Flip chip
Integrated circuits
Lapping
Microelectronic fabrication (materials and surfaces technology)
Packaging
Probes
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal detection
Silicon
Testing, measurement, noise and reliability
Thickness measurement
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Summary:In this paper, we address the issues of global ultra-thinning (/spl les/10 /spl mu/m) of flip chips and develop a reliable and inexpensive process based on a conventional lapping tool and a compact thickness monitoring system. The mechanical and electrical yields as a result of ultra-thinning are reported. The commonly seen die warpage in flip-chip packaging is discussed and addressed in the thinning process since the warpage level can be much more than the final target thickness. Finally we present preliminary results using a CNC milling approach with hope to open the door to generalizing silicon ultra-thinning on all types of IC packages.
DOI:10.1109/RELPHY.2002.996636