Compact modeling of drain and gate current noise for RF CMOS

A model for RF CMOS circuit design is presented that is capable of predicting drain and gate current noise without adjusting any parameters. Additionally, the presence of (i) noise associated with avalanche multiplication, and (ii) shot noise of the direct-tunneling gate current in leaky dielectrics...

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Bibliographic Details
Main Authors: Scholten, A.J., Tiemeijer, L.F., van Langevelde, R., Havens, R.J., Venezia, V.C., Zegers-van Duijnhoven, A.T.A., Neinhus, B., Jungemann, C., Klaasen, D.B.M.
Format: Conference Proceeding
Language:English
Subjects:
Applied sciences
Circuit noise
Circuit synthesis
Design. Technologies. Operation analysis. Testing
Dielectrics
Electrical resistance measurement
Electronics
Exact sciences and technology
Integrated circuits
Low-frequency noise
MOSFETs
Noise measurement
Predictive models
Radio frequency
Semiconductor device modeling
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
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Description
Summary:A model for RF CMOS circuit design is presented that is capable of predicting drain and gate current noise without adjusting any parameters. Additionally, the presence of (i) noise associated with avalanche multiplication, and (ii) shot noise of the direct-tunneling gate current in leaky dielectrics is revealed.
DOI:10.1109/IEDM.2002.1175795