A comparison of three verification techniques: directed testing, pseudo-random testing and property checking

This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bristol was introducing pseudo-random testing (using Specman) and property checking (using GateProp) into their verification...

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Bibliographic Details
Main Authors: Bartley, Mike G., Galpin, Darren, Blackmore, Tim
Format: Conference Proceeding
Language:English
Subjects:
Applied sciences
Electronics
Exact sciences and technology
Hardware > Hardware validation > Functional verification
Integrated circuits
Integrated circuits by function (including memories and processors)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Online Access:Get full text
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Summary:This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bristol was introducing pseudo-random testing (using Specman) and property checking (using GateProp) into their verification flows and thus provides a good opportunity to compare these two techniques with the existing strategy of directed testing using VHDL bus functional models.
ISSN:0738-100X
DOI:10.1145/513918.514121