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A 2-GHz analog-to-digital delta-sigma modulator for CDMA receivers with 79-dB signal-to-noise ratio in 1.23-MHz bandwidth

This paper presents the design of a second-order single-bit analog-to-digital continuous-time delta-sigma modulator (CT-/spl Delta//spl Sigma/M) that can be used in wireless CDMA receivers. The CT-/spl Delta//spl Sigma/M samples at 2 GHz, consumes 18 mW at 1.8 V and has a 79-dB signal-to-noise ratio...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2004-11, Vol.39 (11), p.1819-1828
Main Authors: Dagher, E.H., Stubberud, P.A., Masenten, W.K., Conta, M., Dinh, T.V.
Format: Article
Language:English
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Summary:This paper presents the design of a second-order single-bit analog-to-digital continuous-time delta-sigma modulator (CT-/spl Delta//spl Sigma/M) that can be used in wireless CDMA receivers. The CT-/spl Delta//spl Sigma/M samples at 2 GHz, consumes 18 mW at 1.8 V and has a 79-dB signal-to-noise ratio (SNR) over a 1.23-MHz bandwidth. The CT-/spl Delta//spl Sigma/M was fabricated in a 0.18-/spl mu/m 1-poly 6-metal, CMOS technology and has an active area of approximately 0.892 mm/sup 2/. The /spl Delta//spl Sigma/M's critical performance specifications are derived from the CDMA receiver specifications.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2004.835831