Underfill characterization for low-k dielectric / Cu interconnect IC flip-chip package reliability

• Main Authors: Pei-Haw Tsao, Chender Huang, Mirng-Ji Lii, Su, B., Nun-Sian Tsai
• Format: Conference Proceeding
• Language: English
• Subjects: Applied sciences; Conducting materials; Design. Technologies. Operation analysis. Testing; Dielectric constant; Dielectric materials; Dielectric substrates; Electronics; Exact sciences and technology; Integrated circuit packaging; Integrated circuits; Material properties; Materials; Mechanical factors; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Testing; Thermal expansion
• ISSN: 0569-5503; 2377-5726
• DOI: 10.1109/ECTC.2004.1319423

Due to low dielectric constant inter-metal-dielectric (low-k IMD) materials possessing weaker mechanical properties and higher coefficient of thermal expansion (CTE) compared with IC silicon substrates, the integrity of advanced IC low-k IMD layer/silicon substrate structures, in a packaged form, becomes of great concern. Flip-chip underfill characterization was conducted to investigate the key factors of underfill material properties that can yield good low-k IC package integrity after reliability tests. A simplified stress-coupling-index concept was proposed and used to select five underfills for evaluation, based on their different property characteristics. 27/spl times/27 mm/sup 2/ FCBGA packages with heatspreader were built using 8/spl times/10 mm/sup 2/ low-k test die, and tested by temperature cycling. The test results showed that an FC package with low Tg underfill yielded good performance for low-k package integrity.